| /u-boot/drivers/net/fsl-mc/dpio/ |
| A D | qbman_portal.c | 203 uint32_t *cl = qb_cl(d); in qbman_eq_desc_set_no_orp() local
215 uint32_t *cl = qb_cl(d); in qbman_eq_desc_set_response() local
225 uint32_t *cl = qb_cl(d); in qbman_eq_desc_set_qd() local
289 uint32_t *cl = qb_cl(d); in qbman_pull_desc_set_storage() local
305 uint32_t *cl = qb_cl(d); in qbman_pull_desc_set_numframes() local
314 uint32_t *cl = qb_cl(d); in qbman_pull_desc_set_token() local
321 uint32_t *cl = qb_cl(d); in qbman_pull_desc_set_fq() local
331 uint32_t *cl = qb_cl(d); in qbman_swp_pull() local
528 uint32_t *cl; in qbman_release_desc_clear() local
531 cl = qb_cl(d); in qbman_release_desc_clear()
[all …]
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| /u-boot/board/compulab/cl-som-imx7/ |
| A D | MAINTAINERS | 4 F: board/compulab/cl-som-imx7
5 F: include/configs/cl-som-imx7.h
6 F: configs/cl-som-imx7_defconfig
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| A D | Kconfig | 4 default "cl-som-imx7"
10 default "cl-som-imx7"
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| A D | Makefile | 16 obj-y += cl-som-imx7.o
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| /u-boot/drivers/ddr/marvell/axp/ |
| A D | ddr3_spd.c | 581 u32 cs, cl, cs_num, cs_ena; local
706 if (cl < 5)
707 cl = 5;
770 if (cl != 3)
846 if (cl < 7)
1049 reg |= ((cl + 2) <<
1059 tmp = ddr3_cl_to_valid_cl(cl);
1131 reg |= (((cl - cwl + 1) & 0xF) << 4);
1132 reg |= (((cl - cwl + 6) & 0xF) << 8);
1134 reg |= (((cl - 1) & 0xF) << 12);
[all …]
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| A D | ddr3_hw_training.h | 267 u32 cl; member
323 u32 ddr3_cl_to_valid_cl(u32 cl);
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| A D | ddr3_init.h | 108 u32 ddr3_cl_to_valid_cl(u32 cl);
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| A D | ddr3_dfs.c | 988 tmp = ddr3_cl_to_valid_cl(dram_info->cl); in ddr3_dfs_low_2_high()
1172 tmp = ddr3_cl_to_valid_cl(dram_info->cl); in ddr3_dfs_low_2_high()
1479 tmp = ddr3_cl_to_valid_cl(dram_info->cl) & 0xF; in ddr3_dfs_low_2_high()
1511 reg |= (dram_info->cl << in ddr3_dfs_low_2_high()
1519 reg |= ((dram_info->cl + 1) << in ddr3_dfs_low_2_high()
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| A D | ddr3_read_leveling.c | 223 reg |= (dram_info->cl << in ddr3_read_leveling_sw()
233 reg |= ((dram_info->cl + 1) << in ddr3_read_leveling_sw()
237 reg |= ((dram_info->cl + 2) << in ddr3_read_leveling_sw()
415 rd_sample_delay = dram_info->cl; in ddr3_read_leveling_single_cs_rl_mode()
767 rd_sample_delay = dram_info->cl; in ddr3_read_leveling_single_cs_window_mode()
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| A D | ddr3_init.c | 978 u32 ddr3_cl_to_valid_cl(u32 cl) in ddr3_cl_to_valid_cl() argument
980 switch (cl) { in ddr3_cl_to_valid_cl()
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| A D | ddr3_hw_training.c | 137 dram_info.cl = ddr3_valid_cl_to_cl(reg); in ddr3_hw_training()
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| /u-boot/lib/ |
| A D | string.c | 499 unsigned long cl = 0; in memset() local
505 cl <<= 8; in memset()
506 cl |= c & 0xff; in memset()
509 *sl++ = cl; in memset()
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| /u-boot/arch/x86/cpu/quark/ |
| A D | dram.c | 108 mrc_params->params.cl = fdtdec_get_int(blob, node, "dram-cl", 0); in mrc_configure_params()
121 mrc_params->params.density, mrc_params->params.cl, in mrc_configure_params()
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| A D | smc.c | 83 tcl = mrc_params->params.cl; /* CAS latency in clocks */ in prog_ddr_timing_control()
266 cas = mrc_params->params.cl; in ddrphy_init()
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| /u-boot/drivers/bios_emulator/include/ |
| A D | biosemu.h | 215 u8 ch, cl; member
227 u8 cl; member
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| /u-boot/drivers/ram/octeon/ |
| A D | octeon3_lmc.c | 3208 cl); in lmc_modereg_params0()
3213 if (cl > 9) in lmc_modereg_params0()
3215 if (cl > 10) in lmc_modereg_params0()
3217 if (cl > 11) in lmc_modereg_params0()
3219 if (cl > 12) in lmc_modereg_params0()
3221 if (cl > 13) in lmc_modereg_params0()
3237 if (cl > 5) in lmc_modereg_params0()
3239 if (cl > 6) in lmc_modereg_params0()
3241 if (cl > 7) in lmc_modereg_params0()
3243 if (cl > 8) in lmc_modereg_params0()
[all …]
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| /u-boot/arch/x86/include/asm/arch-quark/ |
| A D | mrc.h | 62 uint8_t cl; member
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| /u-boot/drivers/ddr/marvell/a38x/ |
| A D | mv_ddr_topology.c | 18 unsigned int cl = ceil_div(taa_min, tclk); in mv_ddr_cl_calc() local
20 return mv_ddr_spd_supported_cl_get(cl); in mv_ddr_cl_calc()
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| A D | mv_ddr_spd.c | 41 unsigned int mv_ddr_spd_supported_cl_get(unsigned int cl) in mv_ddr_spd_supported_cl_get() argument
47 mv_ddr_spd_supported_cls[i] < cl) in mv_ddr_spd_supported_cl_get()
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| A D | mv_ddr_spd.h | 291 unsigned int mv_ddr_spd_supported_cl_get(unsigned int cl);
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| /u-boot/arch/arm/mach-imx/mx7/ |
| A D | Kconfig | 84 source "board/compulab/cl-som-imx7/Kconfig"
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| /u-boot/arch/x86/dts/ |
| A D | galileo.dts | 64 dram-cl = <6>;
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| /u-boot/board/synopsys/hsdk/ |
| A D | README | 105 mdb -digilent -run -cl u-boot
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| /u-boot/arch/mips/mach-octeon/include/mach/cvmx/ |
| A D | cvmx-lmcx-defs.h | 2332 uint64_t cl:4; member
2350 uint64_t cl:4; member
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