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Searched refs:cl_mask_table (Results 1 – 3 of 3) sorted by relevance

/u-boot/drivers/ddr/marvell/a38x/
A Dddr3_init.h60 extern u8 cl_mask_table[];
A Dddr3_training.c528 ((cl_mask_table[cl_value] & 0x1) << 2) | in hws_ddr3_tip_init_controller()
529 ((cl_mask_table[cl_value] & 0xe) << 3); in hws_ddr3_tip_init_controller()
1391 (cl_mask_table[cl_value] << 8), 0xf00)); in ddr3_tip_freq_set()
1522 ((cl_mask_table[cl_value] & 0x1) << 2) | in ddr3_tip_freq_set()
1523 ((cl_mask_table[cl_value] & 0xe) << 3); in ddr3_tip_freq_set()
1564 val = ((cl_mask_table[cl_value] & 0x1) << 2) | in ddr3_tip_freq_set()
1565 ((cl_mask_table[cl_value] & 0xe) << 3); in ddr3_tip_freq_set()
A Dddr3_training_db.c202 u8 cl_mask_table[] = { variable

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