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Searched refs:cl_val (Results 1 – 3 of 3) sorted by relevance

/u-boot/drivers/ddr/marvell/a38x/
A Dmv_ddr_training_db.h29 unsigned int cl_val[MV_DDR_FREQ_LAST]; member
A Dddr3_training_leveling.c41 u32 bus_num, if_id, cl_val; in ddr3_tip_dynamic_read_leveling() local
122 cl_val = mv_ddr_cl_val_get(speed_bin_index, freq); in ddr3_tip_dynamic_read_leveling()
123 data = (cl_val << 17) | (0x3 << 25); in ddr3_tip_dynamic_read_leveling()
400 u32 bus_num, if_id, cl_val, bit_num; in ddr3_tip_dynamic_per_bit_read_leveling() local
494 cl_val = mv_ddr_cl_val_get(speed_bin_index, freq); in ddr3_tip_dynamic_per_bit_read_leveling()
495 data = (cl_val << 17) | (0x3 << 25); in ddr3_tip_dynamic_per_bit_read_leveling()
1676 int cl_val = tm->interface_params[0].cas_l; in mv_ddr_rl_dqs_burst() local
1742 rd_sample = cl_val + 2 * sdr_cycle_incr; in mv_ddr_rl_dqs_burst()
1909 rd_sample = cl_val + 2 * sdr_cycle_incr; in mv_ddr_rl_dqs_burst()
A Dddr3_training_db.c117 return cl_table[index].cl_val[freq]; in mv_ddr_cl_val_get()
179 return cwl_table[index].cl_val[freq]; in mv_ddr_cwl_val_get()

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