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Searched refs:clk2 (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/spi/
A Dmscc_bb_spi.c26 u32 clk2; /* Clock value 2nd phase */ member
43 priv->clk2 = 0; in mscc_bb_spi_cs_activate()
47 priv->clk2 = ICPU_SW_MODE_SW_SPI_SCK; in mscc_bb_spi_cs_activate()
67 writel(priv->svalue | priv->clk2, priv->regs); in mscc_bb_spi_cs_activate()
160 writel(value | priv->clk2, priv->regs); in mscc_bb_spi_xfer()
/u-boot/arch/arm/mach-nexell/
A Dclock.c615 int i, n, clk2 = 0; in clk_round_rate() local
666 if (clk2) { in clk_round_rate()
677 if (!clk2 && abs(rate_hz - request) && in clk_round_rate()
679 clk2 = 1; in clk_round_rate()

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