Searched refs:clk_debug (Results 1 – 3 of 3) sorted by relevance
/u-boot/arch/arm/mach-imx/mx7ulp/ |
A D | pcc.c | 93 clk_debug("pcc_clock_enable: clk %d, reg 0x%x, val 0x%x, enable %d\n", in pcc_clock_enable() 106 clk_debug("pcc_clock_enable: val 0x%x\n", val); in pcc_clock_enable() 142 clk_debug("pcc_clock_sel: clk %d, reg 0x%x, val 0x%x, clksrc_type %d\n", in pcc_clock_sel() 156 clk_debug("pcc_clock_sel: val 0x%x\n", val); in pcc_clock_sel() 231 clk_debug("pcc_clock_get_clksrc: clk %d, reg 0x%x, val 0x%x, type %d\n", in pcc_clock_get_clksrc() 249 clk_debug("pcc_clock_get_clksrc: parent scg clk %d\n", *src); in pcc_clock_get_clksrc() 266 clk_debug("pcc_clock_get_rate: parent rate %u\n", rate); in pcc_clock_get_rate() 282 clk_debug("pcc_clock_get_rate: rate %u\n", rate); in pcc_clock_get_rate()
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A D | scg.c | 206 clk_debug("scg_apll_pfd_get_rate reg 0x%x\n", reg); in scg_apll_pfd_get_rate() 213 clk_debug("scg_apll_pfd_get_rate rate %u\n", rate); in scg_apll_pfd_get_rate() 256 clk_debug("scg_spll_pfd_get_rate reg 0x%x\n", reg); in scg_spll_pfd_get_rate() 263 clk_debug("scg_spll_pfd_get_rate rate %u\n", rate); in scg_spll_pfd_get_rate() 303 clk_debug("scg_spll_get_rate reg 0x%x\n", reg); in scg_spll_get_rate() 317 clk_debug("scg_spll_get_rate SPLL %u\n", rate); in scg_spll_get_rate() 325 clk_debug("scg_spll_get_rate PFD %u\n", rate); in scg_spll_get_rate() 363 clk_debug("scg_nic_get_rate niccsr 0x%x\n", reg); in scg_nic_get_rate() 377 clk_debug("scg_nic_get_rate NIC0 rate %u\n", rate); in scg_nic_get_rate() 399 clk_debug("scg_nic_get_rate NIC1 rate %u\n", rate); in scg_nic_get_rate() [all …]
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/u-boot/arch/arm/include/asm/arch-mx7ulp/ |
A D | scg.h | 10 #define clk_debug(fmt, args...) printf(fmt, ##args) macro 12 #define clk_debug(fmt, args...) macro
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