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Searched refs:clk_khz (Results 1 – 3 of 3) sorted by relevance

/u-boot/drivers/watchdog/
A Ddesignware_wdt.c25 unsigned int clk_khz; member
32 static int designware_wdt_settimeout(void __iomem *base, unsigned int clk_khz, in designware_wdt_settimeout() argument
38 i = log_2_n_round_up(timeout * clk_khz) - 16; in designware_wdt_settimeout()
109 designware_wdt_settimeout(priv->base, priv->clk_khz, timeout); in designware_wdt_start()
133 priv->clk_khz = clk_get_rate(&clk) / 1000; in designware_wdt_probe()
134 if (!priv->clk_khz) in designware_wdt_probe()
137 priv->clk_khz = CONFIG_DW_WDT_CLOCK_KHZ; in designware_wdt_probe()
A Drti_wdt.c42 unsigned int clk_khz; member
54 timer_margin = timeout_ms * priv->clk_khz / 1000; in rti_wdt_start()
100 priv->clk_khz = clk_get_rate(&clk); in rti_wdt_probe()
/u-boot/drivers/video/sunxi/
A Dsunxi_dw_hdmi.c214 static void sunxi_dw_hdmi_pll_set(uint clk_khz, int *phy_div) in sunxi_dw_hdmi_pll_set() argument
225 int target = clk_khz * div; in sunxi_dw_hdmi_pll_set()
237 diff = clk_khz - value; in sunxi_dw_hdmi_pll_set()
252 clk_khz, (clock_get_pll3() / 1000) / best_div, in sunxi_dw_hdmi_pll_set()

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