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Searched refs:clk_mask (Results 1 – 5 of 5) sorted by relevance

/u-boot/drivers/net/qe/
A Duccf.c101 u32 clk_mask; in ucc_set_clk_src() local
281 clk_mask = QE_CMXUCR_TX_CLK_SRC_MASK; in ucc_set_clk_src()
284 clk_mask <<= 4; /* Rx field is 4 bits to left of Tx field */ in ucc_set_clk_src()
287 clk_mask <<= shift; in ucc_set_clk_src()
289 out_be32(p_cmxucr, (in_be32(p_cmxucr) & ~clk_mask) | clk_bits); in ucc_set_clk_src()
/u-boot/drivers/qe/
A Duccf.c102 u32 clk_mask; in ucc_set_clk_src() local
282 clk_mask = QE_CMXUCR_TX_CLK_SRC_MASK; in ucc_set_clk_src()
285 clk_mask <<= 4; /* Rx field is 4 bits to left of Tx field */ in ucc_set_clk_src()
288 clk_mask <<= shift; in ucc_set_clk_src()
290 out_be32(p_cmxucr, (in_be32(p_cmxucr) & ~clk_mask) | clk_bits); in ucc_set_clk_src()
/u-boot/drivers/clk/rockchip/
A Dclk_rk3036.c185 static u32 clk_mask[CLK_COUNT] = { in rkclk_pll_get_rate() local
194 mask = clk_mask[clk_id]; in rkclk_pll_get_rate()
A Dclk_rk322x.c187 static u32 clk_mask[CLK_COUNT] = { in rkclk_pll_get_rate() local
196 mask = clk_mask[clk_id]; in rkclk_pll_get_rate()
A Dclk_rk3128.c253 static u32 clk_mask[CLK_COUNT] = { in rkclk_pll_get_rate() local
262 mask = clk_mask[clk_id]; in rkclk_pll_get_rate()

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