Searched refs:clk_rcg_set_rate_mnd (Results 1 – 4 of 4) sorted by relevance
/u-boot/arch/arm/mach-snapdragon/ |
A D | clock-apq8096.c | 48 clk_rcg_set_rate_mnd(priv->base, &sdc_regs, div, 0, 0, in clk_init_sdc() 70 clk_rcg_set_rate_mnd(priv->base, &uart2_regs, 1, 192, 15625, in clk_init_uart()
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A D | clock-apq8016.c | 61 clk_rcg_set_rate_mnd(priv->base, &sdc_regs[slot], div, 0, 0, in clk_init_sdc() 84 clk_rcg_set_rate_mnd(priv->base, &uart2_regs, 1, 144, 15625, in clk_init_uart()
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A D | clock-snapdragon.h | 42 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs,
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A D | clock-snapdragon.c | 78 void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, in clk_rcg_set_rate_mnd() function
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