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Searched refs:clk_sel1 (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/clk/aspeed/
A Dclk_ast2500.c140 ulong apb_div = 4 + 4 * ((readl(&priv->scu->clk_sel1) in ast2500_clk_get_rate()
151 ulong apb_div = 4 + 4 * ((readl(&priv->scu->clk_sel1) in ast2500_clk_get_rate()
342 clrsetbits_le32(&scu->clk_sel1, SCU_MACCLK_MASK, in ast2500_configure_mac()
/u-boot/arch/arm/include/asm/arch-aspeed/
A Dscu_ast2500.h151 u32 clk_sel1; member

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