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Searched refs:clksel_con (Results 1 – 14 of 14) sorted by relevance

/u-boot/drivers/clk/rockchip/
A Dclk_rv1108.c199 val = readl(&cru->clksel_con[22]); in rv1108_saradc_get_clk()
213 rk_clrsetreg(&cru->clksel_con[22], in rv1108_saradc_set_clk()
224 val = readl(&cru->clksel_con[28]); in rv1108_aclk_vio1_get_clk()
238 rk_clrsetreg(&cru->clksel_con[28], in rv1108_aclk_vio1_set_clk()
250 val = readl(&cru->clksel_con[28]); in rv1108_aclk_vio0_get_clk()
264 rk_clrsetreg(&cru->clksel_con[28], in rv1108_aclk_vio0_set_clk()
270 rk_clrsetreg(&cru->clksel_con[29], in rv1108_aclk_vio0_set_clk()
274 rk_clrsetreg(&cru->clksel_con[29], in rv1108_aclk_vio0_set_clk()
285 val = readl(&cru->clksel_con[32]); in rv1108_dclk_vop_get_clk()
314 val = readl(&cru->clksel_con[2]); in rv1108_aclk_bus_get_clk()
[all …]
A Dclk_rk3308.c92 rk_clrsetreg(&cru->clksel_con[0], in rk3308_armclk_set_clk()
100 rk_clrsetreg(&cru->clksel_con[0], in rk3308_armclk_set_clk()
316 con = readl(&cru->clksel_con[34]); in rk3308_saradc_get_clk()
331 rk_clrsetreg(&cru->clksel_con[34], in rk3308_saradc_set_clk()
344 con = readl(&cru->clksel_con[33]); in rk3308_tsadc_get_clk()
359 rk_clrsetreg(&cru->clksel_con[33], in rk3308_tsadc_set_clk()
431 con = readl(&cru->clksel_con[29]); in rk3308_pwm_get_clk()
446 rk_clrsetreg(&cru->clksel_con[29], in rk3308_pwm_set_clk()
460 con = readl(&cru->clksel_con[8]); in rk3308_vop_get_clk()
527 rk_clrsetreg(&cru->clksel_con[8], in rk3308_vop_set_clk()
[all …]
A Dclk_px30.c296 con = readl(&cru->clksel_con[49]); in px30_i2c_get_clk()
300 con = readl(&cru->clksel_con[49]); in px30_i2c_get_clk()
304 con = readl(&cru->clksel_con[50]); in px30_i2c_get_clk()
308 con = readl(&cru->clksel_con[50]); in px30_i2c_get_clk()
329 rk_clrsetreg(&cru->clksel_con[49], in px30_i2c_set_clk()
336 rk_clrsetreg(&cru->clksel_con[49], in px30_i2c_set_clk()
343 rk_clrsetreg(&cru->clksel_con[50], in px30_i2c_set_clk()
485 con = readl(&cru->clksel_con[15]); in px30_nandc_get_clk()
502 rk_clrsetreg(&cru->clksel_con[15], in px30_nandc_set_clk()
642 con = readl(&cru->clksel_con[55]); in px30_saradc_get_clk()
[all …]
A Dclk_rk3399.c454 rk_clrsetreg(&cru->clksel_con[0], in rk3399_configure_cpu_l()
461 rk_clrsetreg(&cru->clksel_con[1], in rk3399_configure_cpu_l()
489 rk_clrsetreg(&cru->clksel_con[2], in rk3399_configure_cpu_b()
496 rk_clrsetreg(&cru->clksel_con[3], in rk3399_configure_cpu_b()
525 con = readl(&cru->clksel_con[61]); in rk3399_i2c_get_clk()
529 con = readl(&cru->clksel_con[62]); in rk3399_i2c_get_clk()
533 con = readl(&cru->clksel_con[63]); in rk3399_i2c_get_clk()
537 con = readl(&cru->clksel_con[61]); in rk3399_i2c_get_clk()
541 con = readl(&cru->clksel_con[62]); in rk3399_i2c_get_clk()
892 val = readl(&cru->clksel_con[26]); in rk3399_saradc_get_clk()
[all …]
A Dclk_rk3328.c301 rk_clrsetreg(&cru->clksel_con[28], in rkclk_init()
305 rk_clrsetreg(&cru->clksel_con[29], in rkclk_init()
324 rk_clrsetreg(&cru->clksel_con[0], in rk3328_configure_cpu()
329 rk_clrsetreg(&cru->clksel_con[1], in rk3328_configure_cpu()
342 con = readl(&cru->clksel_con[34]); in rk3328_i2c_get_clk()
516 con = readl(&cru->clksel_con[24]); in rk3328_pwm_get_clk()
526 rk_clrsetreg(&cru->clksel_con[24], in rk3328_pwm_set_clk()
538 val = readl(&cru->clksel_con[23]); in rk3328_saradc_get_clk()
552 rk_clrsetreg(&cru->clksel_con[23], in rk3328_saradc_set_clk()
563 val = readl(&cru->clksel_con[24]); in rk3328_spi_get_clk()
[all …]
A Dclk_rk3368.c181 con = readl(&cru->clksel_con[con_id]); in rk3368_mmc_get_clk()
278 rk_clrsetreg(&cru->clksel_con[con_id], in rk3368_mmc_set_clk()
325 if (readl(&cru->clksel_con[43]) & GMAC_MUX_SEL_EXTCLK) { in rk3368_gmac_set_clk()
329 u32 con = readl(&cru->clksel_con[43]); in rk3368_gmac_set_clk()
345 rk_clrsetreg(&cru->clksel_con[43], GMAC_DIV_CON_MASK, in rk3368_gmac_set_clk()
398 val = readl(&cru->clksel_con[spiclk->reg]); in rk3368_spi_get_clk()
423 rk_clrsetreg(&cru->clksel_con[spiclk->reg], in rk3368_spi_set_clk()
436 val = readl(&cru->clksel_con[25]); in rk3368_saradc_get_clk()
450 rk_clrsetreg(&cru->clksel_con[25], in rk3368_saradc_set_clk()
540 rk_clrreg(&cru->clksel_con[43], GMAC_MUX_SEL_EXTCLK); in rk3368_gmac_set_parent()
[all …]
/u-boot/arch/arm/mach-rockchip/px30/
A Dpx30.c224 rk_clrsetreg(&cru->clksel_con[34], in board_debug_uart_init()
227 rk_clrsetreg(&cru->clksel_con[35], in board_debug_uart_init()
245 rk_clrsetreg(&cru->clksel_con[40], in board_debug_uart_init()
248 rk_clrsetreg(&cru->clksel_con[41], in board_debug_uart_init()
274 rk_clrsetreg(&cru->clksel_con[46], in board_debug_uart_init()
277 rk_clrsetreg(&cru->clksel_con[47], in board_debug_uart_init()
296 rk_clrsetreg(&cru->clksel_con[37], in board_debug_uart_init()
299 rk_clrsetreg(&cru->clksel_con[38], in board_debug_uart_init()
/u-boot/arch/arm/include/asm/arch-rockchip/
A Dcru_rk3328.h32 u32 clksel_con[53]; member
A Dcru_rk3368.h32 unsigned int clksel_con[56]; member
A Dcru_rk3399.h49 u32 clksel_con[108]; member
A Dcru_rv1108.h37 unsigned int clksel_con[46]; member
A Dcru_px30.h71 unsigned int clksel_con[60]; member
/u-boot/arch/arm/include/asm/arch-rk3308/
A Dcru_rk3308.h81 unsigned int clksel_con[74]; member
/u-boot/arch/arm/mach-rockchip/rk3368/
A Drk3368.c84 rk_clrsetreg(&cru->clksel_con[12], MCU_PLL_SEL_MASK | MCU_CLK_DIV_MASK, in mcu_init()

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