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Searched refs:clock_adjust_periph_pll_div (Results 1 – 5 of 5) sorted by relevance

/u-boot/drivers/clk/tegra/
A Dtegra-car-clk.c60 return clock_adjust_periph_pll_div(clk->id, parent, rate, NULL); in tegra_car_clk_set_rate()
/u-boot/arch/arm/mach-tegra/tegra20/
A Demc.c264 clock_adjust_periph_pll_div(PERIPH_ID_EMC, CLOCK_ID_MEMORY, in tegra_set_emc()
/u-boot/arch/arm/include/asm/arch-tegra/
A Dclock.h238 unsigned clock_adjust_periph_pll_div(enum periph_id periph_id,
/u-boot/drivers/mmc/
A Dtegra_mmc.c390 uint effective_rate = clock_adjust_periph_pll_div(priv->mmc_id, in tegra_mmc_change_clock()
397 clock_adjust_periph_pll_div(priv->mmc_id, CLOCK_ID_PERIPH, in tegra_mmc_change_clock()
/u-boot/arch/arm/mach-tegra/
A Dclock.c442 unsigned clock_adjust_periph_pll_div(enum periph_id periph_id, in clock_adjust_periph_pll_div() function
485 effective_rate = clock_adjust_periph_pll_div(periph_id, parent, rate, in clock_start_periph_pll()

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