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Searched refs:clock_id (Results 1 – 25 of 29) sorted by relevance

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/u-boot/arch/arm/include/asm/arch-mx7/
A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
A Dclock.h342 u32 get_root_clk(enum clk_root_index clock_id);
/u-boot/arch/arm/mach-imx/mx7/
A Dclock_slice.c383 if (clock_id == p->entry) in select()
414 if (clock_id >= CLK_ROOT_MAX) in clock_set_src()
440 if (clock_id >= CLK_ROOT_MAX) in clock_get_src()
463 if (clock_id >= CLK_ROOT_MAX) in clock_set_prediv()
495 if (clock_id >= CLK_ROOT_MAX) in clock_get_prediv()
524 if (clock_id >= CLK_ROOT_MAX) in clock_set_postdiv()
552 if (clock_id >= CLK_ROOT_MAX) in clock_get_postdiv()
579 if (clock_id >= CLK_ROOT_MAX) in clock_set_autopostdiv()
617 if (clock_id >= CLK_ROOT_MAX) in clock_get_autopostdiv()
652 if (clock_id >= CLK_ROOT_MAX) in clock_get_target_val()
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A Dclock.c441 u32 get_root_clk(enum clk_root_index clock_id) in get_root_clk() argument
447 if (clock_root_enabled(clock_id) <= 0) in get_root_clk()
450 if (clock_get_prediv(clock_id, &pre_podf) < 0) in get_root_clk()
453 if (clock_get_postdiv(clock_id, &post_podf) < 0) in get_root_clk()
456 if (clock_get_autopostdiv(clock_id, &auto_podf, &auto_en) < 0) in get_root_clk()
462 if (clock_get_src(clock_id, &root_src) < 0) in get_root_clk()
/u-boot/arch/arm/include/asm/arch-tegra/
A Dclock.h63 unsigned long clock_start_pll(enum clock_id id, u32 divm, u32 divn,
75 int clock_set_pllout(enum clock_id clkid, enum pll_out_id pllout,
90 int clock_ll_read_pll(enum clock_id clkid, u32 *divm, u32 *divn,
198 enum clock_id clock_get_periph_parent(enum periph_id periph_id);
210 enum clock_id parent, unsigned rate);
223 enum clock_id parent);
239 enum clock_id parent, unsigned rate, int *extra_div);
247 unsigned clock_get_rate(enum clock_id clkid);
299 struct clk_pll_simple *clock_get_simple_pll(enum clock_id clkid);
344 enum clock_id parent, int *mux_bits, int *divider_bits);
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/u-boot/arch/arm/include/asm/arch-imx8m/
A Dclock.h263 int clock_root_enabled(enum clk_root_index clock_id);
264 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
266 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
267 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
268 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
269 int clock_get_postdiv(enum clk_root_index clock_id,
271 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
/u-boot/include/
A Dscmi_protocols.h64 u32 clock_id; member
82 u32 clock_id; member
105 u32 clock_id; member
/u-boot/drivers/clk/
A Dclk_scmi.c15 .clock_id = clk->id, in scmi_clk_gate()
44 .clock_id = clk->id, in scmi_clk_get_rate()
66 .clock_id = clk->id, in scmi_clk_set_rate()
A Dclk_versal.c187 static int versal_pm_clock_get_name(u32 clock_id, char *name) in versal_pm_clock_get_name() argument
194 qdata.arg1 = clock_id; in versal_pm_clock_get_name()
204 static int versal_pm_clock_get_topology(u32 clock_id, u32 index, u32 *topology) in versal_pm_clock_get_topology() argument
211 qdata.arg1 = clock_id; in versal_pm_clock_get_topology()
220 static int versal_pm_clock_get_parents(u32 clock_id, u32 index, u32 *parents) in versal_pm_clock_get_parents() argument
227 qdata.arg1 = clock_id; in versal_pm_clock_get_parents()
236 static int versal_pm_clock_get_attributes(u32 clock_id, u32 *attr) in versal_pm_clock_get_attributes() argument
243 qdata.arg1 = clock_id; in versal_pm_clock_get_attributes()
/u-boot/arch/arm/mach-tegra/
A Dclock.c74 static struct clk_pll *get_pll(enum clock_id clkid) in get_pll()
80 if (clkid >= (enum clock_id)TEGRA_CLK_PLLS) { in get_pll()
92 int clock_ll_read_pll(enum clock_id clkid, u32 *divm, u32 *divn, in clock_ll_read_pll()
116 unsigned long clock_start_pll(enum clock_id clkid, u32 divm, u32 divn, in clock_start_pll()
124 if (clkid < (enum clock_id)TEGRA_CLK_PLLS) { in clock_start_pll()
313 enum clock_id parent) in clock_get_periph_rate()
428 enum clock_id clock_get_periph_parent(enum periph_id periph_id) in clock_get_periph_parent()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div()
477 enum clock_id parent, unsigned rate) in clock_start_periph_pll()
536 unsigned clock_get_rate(enum clock_id clkid) in clock_get_rate()
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/u-boot/drivers/firmware/scmi/
A Dsandbox-scmi_agent.c88 static struct sandbox_scmi_clk *get_scmi_clk_state(uint agent_id, uint clock_id) in get_scmi_clk_state() argument
108 if (target[n].id == clock_id) in get_scmi_clk_state()
147 clk_state = get_scmi_clk_state(agent->idx, in->clock_id); in sandbox_scmi_clock_rate_set()
149 dev_err(dev, "Unexpected clock ID %u\n", in->clock_id); in sandbox_scmi_clock_rate_set()
178 clk_state = get_scmi_clk_state(agent->idx, in->clock_id); in sandbox_scmi_clock_rate_get()
180 dev_err(dev, "Unexpected clock ID %u\n", in->clock_id); in sandbox_scmi_clock_rate_get()
207 clk_state = get_scmi_clk_state(agent->idx, in->clock_id); in sandbox_scmi_clock_gate()
209 dev_err(dev, "Unexpected clock ID %u\n", in->clock_id); in sandbox_scmi_clock_gate()
/u-boot/drivers/clk/tegra/
A Dtegra-car-clk.c43 enum clock_id parent; in tegra_car_clk_get_rate()
54 enum clock_id parent; in tegra_car_clk_set_rate()
/u-boot/arch/arm/mach-bcm283x/include/mach/
A Dmsg.h23 int bcm2835_get_mmc_clock(u32 clock_id);
A Dmbox.h244 u32 clock_id; member
247 u32 clock_id; member
/u-boot/arch/arm/mach-bcm283x/
A Dmsg.c74 int bcm2835_get_mmc_clock(u32 clock_id) in bcm2835_get_mmc_clock() argument
85 msg_clk->get_clock_rate.body.req.clock_id = clock_id; in bcm2835_get_mmc_clock()
/u-boot/arch/arm/mach-imx/imx8m/
A Dclock_slice.c1618 if (clock_id == p->entry) in select()
1670 if (clock_id >= CLK_ROOT_MAX) in clock_get_target_val()
1673 root_entry = select(clock_id); in clock_get_target_val()
1693 if (clock_id >= CLK_ROOT_MAX) in clock_set_target_val()
1696 root_entry = select(clock_id); in clock_set_target_val()
1717 if (clock_id >= CLK_ROOT_MAX) in clock_root_enabled()
1720 root_entry = select(clock_id); in clock_root_enabled()
1771 if (clock_id >= CLK_ROOT_MAX) in clock_get_prediv()
1774 root_entry = select(clock_id); in clock_get_prediv()
1809 if (clock_id >= CLK_ROOT_MAX) in clock_get_postdiv()
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A Dclock_imx8mq.c20 static u32 get_root_clk(enum clk_root_index clock_id);
291 static u32 get_root_clk(enum clk_root_index clock_id) in get_root_clk() argument
296 if (clock_root_enabled(clock_id) <= 0) in get_root_clk()
299 if (clock_get_prediv(clock_id, &pre_podf) < 0) in get_root_clk()
302 if (clock_get_postdiv(clock_id, &post_podf) < 0) in get_root_clk()
305 if (clock_get_src(clock_id, &root_src) < 0) in get_root_clk()
A Dclock_imx8mm.c23 static u32 get_root_clk(enum clk_root_index clock_id);
725 static u32 get_root_clk(enum clk_root_index clock_id) in get_root_clk() argument
730 if (clock_root_enabled(clock_id) <= 0) in get_root_clk()
733 if (clock_get_prediv(clock_id, &pre_podf) < 0) in get_root_clk()
736 if (clock_get_postdiv(clock_id, &post_podf) < 0) in get_root_clk()
739 if (clock_get_src(clock_id, &root_src) < 0) in get_root_clk()
/u-boot/drivers/mmc/
A Dbcm2835_sdhci.c183 int clock_id = (int)dev_get_driver_data(dev); in bcm2835_sdhci_probe() local
189 ret = bcm2835_get_mmc_clock(clock_id); in bcm2835_sdhci_probe()
/u-boot/arch/arm/include/asm/arch-tegra20/
A Dclock-tables.h13 enum clock_id { enum
/u-boot/arch/arm/include/asm/arch-tegra114/
A Dclock-tables.h12 enum clock_id { enum
/u-boot/arch/arm/include/asm/arch-tegra30/
A Dclock-tables.h12 enum clock_id { enum
/u-boot/arch/arm/mach-tegra/tegra20/
A Dclock.c63 static enum clock_id clock_source[CLOCK_TYPE_COUNT][CLOCK_MAX_MUX] = {
450 enum clock_id get_periph_clock_id(enum periph_id periph_id, int source) in get_periph_clock_id()
482 enum clock_id parent, int *mux_bits, int *divider_bits) in get_periph_clock_source()
/u-boot/arch/arm/mach-tegra/tegra114/
A Dclock.c66 static enum clock_id clock_source[CLOCK_TYPE_COUNT][CLOCK_MAX_MUX+1] = {
527 enum clock_id get_periph_clock_id(enum periph_id periph_id, int source) in get_periph_clock_id()
559 enum clock_id parent, int *mux_bits, int *divider_bits) in get_periph_clock_source()
/u-boot/arch/arm/mach-tegra/tegra30/
A Dclock.c66 static enum clock_id clock_source[CLOCK_TYPE_COUNT][CLOCK_MAX_MUX+1] = {
507 enum clock_id get_periph_clock_id(enum periph_id periph_id, int source) in get_periph_clock_id()
539 enum clock_id parent, int *mux_bits, int *divider_bits) in get_periph_clock_source()

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