/u-boot/arch/arm/mach-tegra/ |
A D | clock.c | 592 int clock_set_rate(enum clock_id clkid, u32 n, u32 m, u32 p, u32 cpcon) in clock_set_rate() function 769 clock_set_rate(CLOCK_ID_PERIPH, 408, 12, 0, 8); in tegra30_set_up_pllp() 770 clock_set_rate(CLOCK_ID_CGENERAL, 456, 12, 1, 8); in tegra30_set_up_pllp() 774 clock_set_rate(CLOCK_ID_PERIPH, 408, 26, 0, 8); in tegra30_set_up_pllp() 775 clock_set_rate(CLOCK_ID_CGENERAL, 600, 26, 0, 8); in tegra30_set_up_pllp() 779 clock_set_rate(CLOCK_ID_PERIPH, 408, 13, 0, 8); in tegra30_set_up_pllp() 780 clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8); in tegra30_set_up_pllp()
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/u-boot/arch/arm/mach-tegra/tegra20/ |
A D | clock.c | 591 clock_set_rate(CLOCK_ID_PERIPH, 432, 12, 1, 8); in clock_early_init() 592 clock_set_rate(CLOCK_ID_CGENERAL, 600, 12, 0, 8); in clock_early_init() 596 clock_set_rate(CLOCK_ID_PERIPH, 432, 26, 1, 8); in clock_early_init() 597 clock_set_rate(CLOCK_ID_CGENERAL, 600, 26, 0, 8); in clock_early_init() 601 clock_set_rate(CLOCK_ID_PERIPH, 432, 13, 1, 8); in clock_early_init() 602 clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8); in clock_early_init()
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/u-boot/arch/arm/mach-tegra/tegra114/ |
A D | clock.c | 677 clock_set_rate(CLOCK_ID_CGENERAL, 600, 12, 0, 8); in clock_early_init() 678 clock_set_rate(CLOCK_ID_DISPLAY, 925, 12, 0, 12); in clock_early_init() 682 clock_set_rate(CLOCK_ID_CGENERAL, 600, 26, 0, 8); in clock_early_init() 683 clock_set_rate(CLOCK_ID_DISPLAY, 925, 26, 0, 12); in clock_early_init() 687 clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8); in clock_early_init() 688 clock_set_rate(CLOCK_ID_DISPLAY, 925, 13, 0, 12); in clock_early_init()
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/u-boot/arch/arm/mach-tegra/tegra210/ |
A D | clock.c | 989 clock_set_rate(CLOCK_ID_CGENERAL, 600, 12, 0, 8); in clock_early_init() 990 clock_set_rate(CLOCK_ID_DISPLAY, 925, 12, 0, 12); in clock_early_init() 994 clock_set_rate(CLOCK_ID_CGENERAL, 600, 26, 0, 8); in clock_early_init() 995 clock_set_rate(CLOCK_ID_DISPLAY, 925, 26, 0, 12); in clock_early_init() 999 clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8); in clock_early_init() 1000 clock_set_rate(CLOCK_ID_DISPLAY, 925, 13, 0, 12); in clock_early_init() 1003 clock_set_rate(CLOCK_ID_CGENERAL, 125, 4, 0, 0); in clock_early_init() 1004 clock_set_rate(CLOCK_ID_DISPLAY, 96, 2, 0, 12); in clock_early_init() 1007 clock_set_rate(CLOCK_ID_CGENERAL, 125, 8, 0, 0); in clock_early_init() 1008 clock_set_rate(CLOCK_ID_DISPLAY, 96, 4, 0, 0); in clock_early_init()
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/u-boot/arch/arm/mach-tegra/tegra124/ |
A D | clock.c | 857 clock_set_rate(CLOCK_ID_CGENERAL, 600, 12, 0, 8); in clock_early_init() 858 clock_set_rate(CLOCK_ID_DISPLAY, 925, 12, 0, 12); in clock_early_init() 862 clock_set_rate(CLOCK_ID_CGENERAL, 600, 26, 0, 8); in clock_early_init() 863 clock_set_rate(CLOCK_ID_DISPLAY, 925, 26, 0, 12); in clock_early_init() 867 clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8); in clock_early_init() 868 clock_set_rate(CLOCK_ID_DISPLAY, 925, 13, 0, 12); in clock_early_init() 1135 clock_set_rate(CLOCK_ID_DISPLAY, best_n, best_m, best_p, cpcon); in clock_set_display_rate()
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/u-boot/arch/arm/include/asm/arch-tegra/ |
A D | clock.h | 373 int clock_set_rate(enum clock_id clkid, u32 n, u32 m, u32 p, u32 cpcon);
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