Searched refs:cm_clkmode_dpll (Results 1 – 8 of 8) sorted by relevance
| /u-boot/arch/arm/mach-omap2/am33xx/ |
| A D | clock_am33xx.c | 25 .cm_clkmode_dpll = CM_WKUP + 0x88,
32 .cm_clkmode_dpll = CM_WKUP + 0x90,
41 .cm_clkmode_dpll = CM_WKUP + 0x8C,
48 .cm_clkmode_dpll = CM_WKUP + 0x94,
55 .cm_clkmode_dpll = CM_WKUP + 0x98,
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| A D | clock_am43xx.c | 23 .cm_clkmode_dpll = CM_WKUP + 0x560,
30 .cm_clkmode_dpll = CM_WKUP + 0x520,
39 .cm_clkmode_dpll = CM_WKUP + 0x5E0,
46 .cm_clkmode_dpll = CM_WKUP + 0x5A0,
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| A D | clock.c | 38 clrsetbits_le32(dpll_regs->cm_clkmode_dpll, in do_lock_dpll()
48 dpll_regs->cm_clkmode_dpll); in wait_for_lock()
55 clrsetbits_le32(dpll_regs->cm_clkmode_dpll, in do_bypass_dpll()
65 dpll_regs->cm_clkmode_dpll); in wait_for_bypass()
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| /u-boot/arch/arm/include/asm/arch-am33xx/ |
| A D | clock.h | 92 u32 cm_clkmode_dpll; member
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| /u-boot/board/siemens/pxm2/ |
| A D | board.c | 362 .cm_clkmode_dpll = CM_WKUP + 0x98,
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| /u-boot/board/siemens/rut/ |
| A D | board.c | 356 .cm_clkmode_dpll = CM_WKUP + 0x98,
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| /u-boot/arch/arm/mach-omap2/ |
| A D | clocks-common.c | 107 clrsetbits_le32(&dpll_regs->cm_clkmode_dpll, in do_bypass_dpll()
127 clrsetbits_le32(&dpll_regs->cm_clkmode_dpll, in do_lock_dpll()
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| /u-boot/arch/arm/include/asm/ |
| A D | omap_common.h | 505 u32 cm_clkmode_dpll; member
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