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Searched refs:con2 (Results 1 – 17 of 17) sorted by relevance

/u-boot/drivers/adc/
A Dexynos-adc.c43 cfg = readl(&regs->con2); in exynos_adc_start_channel()
46 writel(cfg, &regs->con2); in exynos_adc_start_channel()
97 writel(cfg, &regs->con2); in exynos_adc_probe()
/u-boot/arch/arm/mach-exynos/include/mach/
A Dadc.h59 unsigned int con2; member
/u-boot/arch/arm/include/asm/arch-rockchip/
A Dcru_rk3188.h37 u32 con2; member
A Dcru_rk3368.h28 unsigned int con2; member
A Dcru_rk3036.h34 unsigned int con2; member
A Dcru_rk3128.h39 unsigned int con2; member
A Dcru_rk322x.h35 unsigned int con2; member
A Dcru_rk3288.h38 u32 con2; member
A Dcru_rv1108.h31 unsigned int con2; member
A Dcru_px30.h45 unsigned int con2; member
/u-boot/drivers/net/
A Dpic32_eth.h16 struct pic32_reg_atomic con2; /* 0x10 */ member
A Dpic32_eth.c317 bufsz = readl(&ectl_p->con2.raw); in pic32_rx_desc_init()
320 writel(bufsz, &ectl_p->con2.raw); in pic32_rx_desc_init()
/u-boot/arch/arm/include/asm/arch-rk3308/
A Dcru_rk3308.h57 unsigned int con2; member
/u-boot/drivers/clk/rockchip/
A Dclk_rv1108.c104 rk_clrsetreg(&pll->con2, FRACDIV_MASK, in rkclk_set_pll()
111 while (readl(&pll->con2) & (1 << LOCK_STA_SHIFT)) in rkclk_set_pll()
A Dclk_rk3188.c114 rk_clrsetreg(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1); in rkclk_set_pll()
A Dclk_rk3368.c116 clrsetbits_le32(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1); in rkclk_set_pll()
A Dclk_rk3288.c172 rk_clrsetreg(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1); in rkclk_set_pll()

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