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Searched refs:control (Results 1 – 25 of 440) sorted by relevance

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/u-boot/drivers/pinctrl/renesas/
A DKconfig4 bool "Renesas pin control drivers"
11 bool "Renesas RCar Gen2 R8A7790 pin control driver"
21 bool "Renesas RCar Gen2 R8A7791 pin control driver"
31 bool "Renesas RCar Gen2 R8A7792 pin control driver"
41 bool "Renesas RCar Gen2 R8A7793 pin control driver"
51 bool "Renesas RCar Gen2 R8A7794 pin control driver"
91 bool "Renesas RCar Gen3 R8A7795 pin control driver"
101 bool "Renesas RCar Gen3 R8A7796 pin control driver"
111 bool "Renesas RCar Gen3 R8A77965 pin control driver"
121 bool "Renesas RCar Gen3 R8A77970 pin control driver"
[all …]
/u-boot/drivers/pinctrl/mscc/
A DKconfig10 bool "Microsemi ocelot family pin control driver"
12 Support pin multiplexing and pin configuration control on
19 bool "Microsemi luton family pin control driver"
21 Support pin multiplexing and pin configuration control on
28 bool "Microsemi jr2 family pin control driver"
30 Support pin multiplexing and pin configuration control on
37 bool "Microsemi servalt family pin control driver"
39 Support pin multiplexing and pin configuration control on
46 bool "Microsemi serval family pin control driver"
48 Support pin multiplexing and pin configuration control on
/u-boot/arch/arm/dts/
A Dkeystone-k2hk-clocks.dtsi18 reg-names = "control";
35 reg-names = "control";
44 reg-names = "control";
53 reg-names = "control";
62 reg-names = "control", "domain";
72 reg-names = "control", "domain";
82 reg-names = "control", "domain";
92 reg-names = "control", "domain";
102 reg-names = "control", "domain";
112 reg-names = "control", "domain";
[all …]
A Dkeystone-k2l-clocks.dtsi18 reg-names = "control";
35 reg-names = "control";
44 reg-names = "control";
52 reg-names = "control", "domain";
63 reg-names = "control", "domain";
73 reg-names = "control", "domain";
83 reg-names = "control", "domain";
93 reg-names = "control", "domain";
103 reg-names = "control", "domain";
113 reg-names = "control", "domain";
[all …]
A Dzynqmp-zcu1275-revB.dts51 rxc-skew-ps = <1800>; /* Skew control of RX_CLK pad output */
53 txen-skew-ps = <900>; /* Skew control of TX_CTL pad input */
54 rxdv-skew-ps = <0>; /* Skew control of RX_CTL pad output */
55 rxd0-skew-ps = <0>; /* Skew control of RXD0 pad output */
56 rxd1-skew-ps = <0>; /* Skew control of RXD1 pad output */
57 rxd2-skew-ps = <0>; /* Skew control of RXD2 pad output */
58 rxd3-skew-ps = <0>; /* Skew control of RXD3 pad output */
59 txd0-skew-ps = <900>; /* Skew control of TXD0 pad input */
60 txd1-skew-ps = <900>; /* Skew control of TXD1 pad input */
61 txd2-skew-ps = <900>; /* Skew control of TXD2 pad input */
[all …]
A Dkeystone-k2e-clocks.dtsi17 reg-names = "control", "multiplier", "post-divider";
26 reg-names = "control";
35 reg-names = "control";
44 reg-names = "control", "domain";
54 reg-names = "control", "domain";
64 reg-names = "control", "domain";
74 reg-names = "control", "domain";
A Dkeystone-clocks.dtsi169 reg-names = "control", "domain";
180 reg-names = "control", "domain";
190 reg-names = "control", "domain";
201 reg-names = "control", "domain";
211 reg-names = "control", "domain";
221 reg-names = "control", "domain";
231 reg-names = "control", "domain";
241 reg-names = "control", "domain";
251 reg-names = "control", "domain";
261 reg-names = "control", "domain";
[all …]
A Dzynqmp-zcu1285-revA.dts232 rxc-skew-ps = <1800>; /* Skew control of RX_CLK pad output */
234 txen-skew-ps = <900>; /* Skew control of TX_CTL pad input */
235 rxdv-skew-ps = <0>; /* Skew control of RX_CTL pad output */
236 rxd0-skew-ps = <0>; /* Skew control of RXD0 pad output */
237 rxd1-skew-ps = <0>; /* Skew control of RXD1 pad output */
238 rxd2-skew-ps = <0>; /* Skew control of RXD2 pad output */
239 rxd3-skew-ps = <0>; /* Skew control of RXD3 pad output */
240 txd0-skew-ps = <900>; /* Skew control of TXD0 pad input */
241 txd1-skew-ps = <900>; /* Skew control of TXD1 pad input */
242 txd2-skew-ps = <900>; /* Skew control of TXD2 pad input */
[all …]
/u-boot/doc/device-tree-bindings/net/
A Dmicrel-ksz90x1.txt46 - rxc-skew-ps : Skew control of RXC pad
47 - rxdv-skew-ps : Skew control of RX CTL pad
48 - txc-skew-ps : Skew control of TXC pad
49 - txen-skew-ps : Skew control of TX CTL pad
50 - rxd0-skew-ps : Skew control of RX data 0 pad
51 - rxd1-skew-ps : Skew control of RX data 1 pad
52 - rxd2-skew-ps : Skew control of RX data 2 pad
53 - rxd3-skew-ps : Skew control of RX data 3 pad
54 - txd0-skew-ps : Skew control of TX data 0 pad
55 - txd1-skew-ps : Skew control of TX data 1 pad
[all …]
/u-boot/drivers/i2c/
A Dtegra_i2c.c38 struct i2c_control *control; member
156 writel(data, &i2c_bus->control->tx_fifo); in send_packet_headers()
161 writel(data, &i2c_bus->control->tx_fifo); in send_packet_headers()
174 writel(data, &i2c_bus->control->tx_fifo); in send_packet_headers()
236 struct i2c_control *control = i2c_bus->control; in send_recv_packets() local
246 int_status = readl(&control->int_status); in send_recv_packets()
247 writel(int_status, &control->int_status); in send_recv_packets()
269 writel(local, &control->tx_fifo); in send_recv_packets()
284 local = readl(&control->rx_fifo); in send_recv_packets()
404 i2c_bus->control = in tegra_i2c_probe()
[all …]
A Dmvtwsi.c60 u32 control; member
72 u32 control; member
271 int control, status; in twsi_wait() local
275 control = readl(&twsi->control); in twsi_wait()
276 if (control & MVTWSI_CONTROL_IFLG) { in twsi_wait()
346 &twsi->control); in twsi_send()
373 control = MVTWSI_CONTROL_TWSIEN; in twsi_recv()
375 writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control); in twsi_recv()
397 int control, stop_status; in twsi_stop() local
403 writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control); in twsi_stop()
[all …]
/u-boot/drivers/ata/
A Dmvsata_ide.c138 u32 control; in mvsata_ide_initialize_port() local
148 control = readl(&port->scontrol); in mvsata_ide_initialize_port()
149 control = (control & ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_INIT; in mvsata_ide_initialize_port()
150 writel(control, &port->scontrol); in mvsata_ide_initialize_port()
152 control = (control & ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_USE; in mvsata_ide_initialize_port()
153 writel(control, &port->scontrol); in mvsata_ide_initialize_port()
/u-boot/drivers/pinctrl/mvebu/
A DKconfig5 bool "Armada 37xx pin control driver"
7 Support pin multiplexing and pin configuration control on
12 bool "Armada 7k/8k pin control driver"
14 Support pin multiplexing and pin configuration control on
/u-boot/drivers/pinctrl/broadcom/
A DKconfig4 bool "Broadcom 283x family pin control driver"
6 Support pin multiplexing and pin configuration control on
12 bool "Broadcom 6838 family pin control driver"
14 Support pin multiplexing and pin configuration control on
/u-boot/arch/arm/mach-imx/
A Dtimer.c21 unsigned int control; member
72 __raw_writel(GPTCR_SWR, &cur_gpt->control); in timer_init()
76 __raw_writel(0, &cur_gpt->control); in timer_init()
78 i = __raw_readl(&cur_gpt->control); in timer_init()
104 __raw_writel(i, &cur_gpt->control); in timer_init()
/u-boot/drivers/serial/
A Dserial_xuartlite.c32 unsigned int control; member
96 uart_out32(&regs->control, 0); in uartlite_serial_probe()
97 uart_out32(&regs->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX); in uartlite_serial_probe()
102 uart_out32(&regs->control, ULITE_CONTROL_RST_RX | in uartlite_serial_probe()
149 uart_out32(&regs->control, 0); in _debug_uart_init()
150 uart_out32(&regs->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX); in _debug_uart_init()
155 uart_out32(&regs->control, ULITE_CONTROL_RST_RX | in _debug_uart_init()
A Dserial_meson.c17 u32 control; member
49 val = readl(&uart->control); in meson_serial_init()
51 writel(val, &uart->control); in meson_serial_init()
53 writel(val, &uart->control); in meson_serial_init()
55 writel(val, &uart->control); in meson_serial_init()
72 u32 val = readl(&uart->control); in meson_serial_rx_error()
76 writel(val, &uart->control); in meson_serial_rx_error()
78 writel(val, &uart->control); in meson_serial_rx_error()
A Daltera_jtag_uart.c26 u32 control; /* Control register */ member
42 u32 st = readl(&regs->control); in altera_jtaguart_putc()
61 u32 st = readl(&regs->control); in altera_jtaguart_pending()
89 writel(ALTERA_JTAG_AC, &regs->control); /* clear AC flag */ in altera_jtaguart_probe()
140 u32 st = readl(&regs->control); in _debug_uart_putc()
/u-boot/drivers/ram/
A Dstm32_sdram.c167 struct stm32_sdram_control *control; in stm32_sdram_init() local
180 control = params->bank_params[i].sdram_control; in stm32_sdram_init()
185 writel(control->sdclk << FMC_SDCR_SDCLK_SHIFT in stm32_sdram_init()
186 | control->cas_latency << FMC_SDCR_CAS_SHIFT in stm32_sdram_init()
187 | control->no_banks << FMC_SDCR_NB_SHIFT in stm32_sdram_init()
189 | control->no_rows << FMC_SDCR_NR_SHIFT in stm32_sdram_init()
190 | control->no_columns << FMC_SDCR_NC_SHIFT in stm32_sdram_init()
192 | control->rd_burst << FMC_SDCR_RBURST_SHIFT, in stm32_sdram_init()
197 | control->no_banks << FMC_SDCR_NB_SHIFT in stm32_sdram_init()
199 | control->no_rows << FMC_SDCR_NR_SHIFT in stm32_sdram_init()
[all …]
/u-boot/drivers/pinctrl/mtmips/
A DKconfig7 bool "MediaTek MT7620 pin control driver"
11 Support pin multiplexing control on MediaTek MT7620.
16 bool "MediaTek MT7628 pin control driver"
20 Support pin multiplexing control on MediaTek MT7628.
/u-boot/arch/arm/mach-omap2/
A Dabb.c59 void abb_setup(u32 fuse, u32 ldovbb, u32 setup, u32 control, in abb_setup() argument
65 if (!setup || !control || !txdone) in abb_setup()
101 writel(0, control); in abb_setup()
113 setbits_le32(control, opp_sel_mask | OMAP_ABB_CONTROL_OPP_CHANGE_MASK); in abb_setup()
/u-boot/arch/arm/mach-lpc32xx/
A Ddram.c56 writel(0x00000193, &emc->control); in ddr_init()
59 writel(0x00000113, &emc->control); in ddr_init()
67 writel(0x00000093, &emc->control); in ddr_init()
70 writel(0x00000093, &emc->control); in ddr_init()
73 writel(0x00000010, &emc->control); in ddr_init()
/u-boot/arch/microblaze/cpu/
A Dtimer.c45 tmr->control = tmr->control | TIMER_INTERRUPT; in timer_isr()
89 tmr->control = TIMER_INTERRUPT | TIMER_RESET; in timer_init()
90 tmr->control = TIMER_ENABLE | TIMER_ENABLE_INTR |\ in timer_init()
/u-boot/drivers/timer/
A Daltera_timer.c24 u32 control; /* Timer control reg */ member
56 writel(0, &regs->control); in altera_timer_probe()
57 writel(ALTERA_TIMER_STOP, &regs->control); in altera_timer_probe()
61 writel(ALTERA_TIMER_CONT | ALTERA_TIMER_START, &regs->control); in altera_timer_probe()
/u-boot/tools/binman/
A Dbinman39 from binman import control
81 glob_list = control.GetEntryModules(False)
117 control.WriteEntryDocs(control.GetEntryModules())
121 ret_code = control.Binman(args)

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