Home
last modified time | relevance | path

Searched refs:control_ddrio_0 (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/arm/mach-omap2/omap5/
A Dhwinit.c67 writel(ioregs->ctrl_ddrio_0, (*ctrl)->control_ddrio_0); in io_settings_lpddr2()
87 writel(ioregs->ctrl_ddrio_0, (*ctrl)->control_ddrio_0); in io_settings_ddr3()
A Dprcm-regs.c334 .control_ddrio_0 = 0x4A002E50,
426 .control_ddrio_0 = 0x4A002E50,
/u-boot/arch/arm/include/asm/
A Domap_common.h425 u32 control_ddrio_0; member

Completed in 9 milliseconds