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Searched refs:control_lpddr2ch1_0 (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/arm/mach-omap2/omap5/
A Dhwinit.c65 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_0); in io_settings_lpddr2()
96 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_0); in io_settings_ddr3()
A Dprcm-regs.c332 .control_lpddr2ch1_0 = 0x4A002E48,
424 .control_lpddr2ch1_0 = 0x4A002E48,
/u-boot/arch/arm/include/asm/
A Domap_common.h423 u32 control_lpddr2ch1_0; member

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