Searched refs:cpld (Results 1 – 25 of 28) sorted by relevance
12
| /u-boot/board/freescale/p2041rdb/ |
| A D | cpld.h | 45 #define cpld ((cpld_data_t *)CPLD_BASE) macro
48 #define CPLD_SW(x) (cpld->sw[(x) - 2])
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| A D | Makefile | 8 obj-y += cpld.o
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| A D | README | 111 cpld reset - hard reset to default bank
112 cpld reset altbank - reset to alternate bank
113 cpld lane_mux <lane> <mux_value> - set multiplexed lane pin
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| /u-boot/arch/arm/dts/ |
| A D | r8a77950-ulcb-u-boot.dts | 12 cpld {
13 compatible = "renesas,ulcb-cpld";
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| A D | r8a77960-ulcb-u-boot.dts | 12 cpld {
13 compatible = "renesas,ulcb-cpld";
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| A D | r8a77965-ulcb-u-boot.dts | 12 cpld {
13 compatible = "renesas,ulcb-cpld";
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| A D | fsl-ls1043a-rdb.dts | 89 cpld: board-control@2,0 { label
90 compatible = "fsl,ls1043ardb-cpld";
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| /u-boot/board/renesas/stout/ |
| A D | Makefile | 14 obj-y := stout.o cpld.o qos.o
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| A D | cpld.c | 160 cpld, 4, 1, do_cpld,
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| /u-boot/board/freescale/ls1043ardb/ |
| A D | Makefile | 9 obj-y += cpld.o
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| A D | cpld.c | 164 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
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| /u-boot/board/freescale/ls1046ardb/ |
| A D | Makefile | 9 obj-y += cpld.o
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| A D | cpld.c | 158 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
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| /u-boot/board/LaCie/net2big_v2/ |
| A D | Makefile | 12 obj-y += ../common/cpld-gpio-bus.o
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| /u-boot/board/renesas/ulcb/ |
| A D | Makefile | 12 obj-y := ulcb.o cpld.o ../rcar-common/common.o
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| A D | cpld.c | 133 cpld, 4, 1, do_cpld,
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| /u-boot/board/freescale/t208xrdb/ |
| A D | Makefile | 10 obj-$(CONFIG_TARGET_T2080RDB) += t208xrdb.o eth_t208xrdb.o cpld.o
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| A D | cpld.c | 66 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
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| /u-boot/board/freescale/t102xrdb/ |
| A D | Makefile | 11 obj-$(CONFIG_TARGET_T1024RDB) += cpld.o
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| A D | cpld.c | 97 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
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| /u-boot/board/freescale/t104xrdb/ |
| A D | Makefile | 9 obj-y += cpld.o
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| A D | cpld.c | 108 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
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| /u-boot/board/freescale/t4rdb/ |
| A D | Makefile | 12 obj-y += cpld.o
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| A D | cpld.c | 121 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
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| /u-boot/arch/m68k/cpu/mcf5445x/ |
| A D | speed.c | 145 u8 *cpld = (u8 *)(CONFIG_SYS_CS2_BASE + 3); in setup_5445x_clocks() local
167 bootmode = (in_8(cpld) & 0x03); in setup_5445x_clocks()
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