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Searched refs:cpll_mdiv (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-exynos/
A Dclock_init.h50 unsigned cpll_mdiv; member
A Dclock_init_exynos5.c148 .cpll_mdiv = 0xde,
271 .cpll_mdiv = 0xde,
374 .cpll_mdiv = 0xde,
641 val = set_pll(mem->cpll_mdiv, mem->cpll_pdiv, mem->cpll_sdiv); in exynos5250_system_clock_init()
870 val = set_pll(mem->cpll_mdiv, mem->cpll_pdiv, mem->cpll_sdiv); in exynos5420_system_clock_init()

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