Home
last modified time | relevance | path

Searched refs:cpu_pll (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-ath79/qca956x/
A Dclk.c315 u32 pll, cpu_pll, ddr_pll, misc; in get_clocks() local
345 cpu_pll = nint * ref_rate / ref_div; in get_clocks()
346 cpu_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13); in get_clocks()
347 cpu_pll += (hfrac >> 13) * ref_rate / ref_div; in get_clocks()
348 cpu_pll /= (1 << out_div); in get_clocks()
378 cpu_rate = cpu_pll / (postdiv + 1); in get_clocks()
386 ddr_rate = cpu_pll / (postdiv + 1); in get_clocks()
398 ahb_rate = cpu_pll / (postdiv + 1); in get_clocks()
/u-boot/arch/mips/mach-ath79/ar934x/
A Dclk.c48 struct ar934x_pll_config cpu_pll; member
117 u32 reg, cpu_pll, cpu_srif, ddr_pll, ddr_srif; in ar934x_pll_init() local
148 pll_cfg = &ar934x_clock_config[i].cpu_pll; in ar934x_pll_init()
151 cpu_pll = in ar934x_pll_init()
181 writel(cpu_pll | AR934X_PLL_CPU_CONFIG_PLLPWD, in ar934x_pll_init()

Completed in 5 milliseconds