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Searched refs:cr1 (Results 1 – 22 of 22) sorted by relevance

/u-boot/arch/arm/cpu/armv7/stv0991/
A Dtimer.c38 writel(readl(&gpt1_regs_ptr->cr1) & ~GPT_CR1_CEN, &gpt1_regs_ptr->cr1); in timer_init()
41 writel(readl(&gpt1_regs_ptr->cr1) | GPT_MODE_AUTO_RELOAD, in timer_init()
42 &gpt1_regs_ptr->cr1); in timer_init()
48 writel(readl(&gpt1_regs_ptr->cr1) | GPT_CR1_CEN, in timer_init()
49 &gpt1_regs_ptr->cr1); in timer_init()
/u-boot/drivers/timer/
A Dstm32_timer.c30 u32 cr1; member
94 clrbits_le32(&regs->cr1, CR1_CEN); in stm32_timer_probe()
107 setbits_le32(&regs->cr1, CR1_ARPE); in stm32_timer_probe()
113 setbits_le32(&regs->cr1, CR1_CEN); in stm32_timer_probe()
/u-boot/arch/arm/include/asm/arch-stm32f4/
A Dstm32_pwr.h23 u32 cr1; /* power control register 1 */ member
/u-boot/arch/arm/include/asm/arch-stm32f7/
A Dstm32_pwr.h23 u32 cr1; /* power control register 1 */ member
/u-boot/drivers/serial/
A Dserial_stm32.c63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig() local
77 clrbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit)); in stm32_serial_setconfig()
97 clrsetbits_le32(cr1, in stm32_serial_setconfig()
101 setbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit)); in stm32_serial_setconfig()
A Dserial_mxc.c123 u32 cr1; member
144 writel(0, &base->cr1); in _mxc_serial_init()
179 writel(UCR1_UARTEN, &base->cr1); in _mxc_serial_setbrg()
/u-boot/arch/arm/include/asm/arch-stv0991/
A Dstv0991_gpt.h13 u32 cr1; member
/u-boot/drivers/spi/
A Dstm32_spi.c230 u32 cr1, sr; in stm32_spi_stopxfer() local
235 cr1 = readl(priv->base + STM32_SPI_CR1); in stm32_spi_stopxfer()
237 if (!(cr1 & SPI_CR1_SPE)) in stm32_spi_stopxfer()
244 if (cr1 & SPI_CR1_CSTART) { in stm32_spi_stopxfer()
245 writel(cr1 | SPI_CR1_CSUSP, priv->base + STM32_SPI_CR1); in stm32_spi_stopxfer()
/u-boot/arch/m68k/include/asm/coldfire/
A Dpwm.h17 u8 cr1; member
/u-boot/include/faraday/
A Dftsdmc021.h21 unsigned int cr1; /* 0x08 - SDRAM Configuration Reg 1 */ member
/u-boot/arch/nds32/lib/
A Dasm-offsets.c47 OFFSET(FTSDMC021_CR1, ftsdmc021, cr1); in main()
/u-boot/drivers/i2c/
A Dstm32f7_i2c.c25 u32 cr1; /* I2C control register 1 */ member
826 clrbits_le32(&regs->cr1, STM32_I2C_CR1_PE); in stm32_i2c_hw_config()
843 clrbits_le32(&regs->cr1, STM32_I2C_CR1_ANFOFF); in stm32_i2c_hw_config()
845 setbits_le32(&regs->cr1, STM32_I2C_CR1_ANFOFF); in stm32_i2c_hw_config()
846 setbits_le32(&regs->cr1, STM32_I2C_CR1_PE); in stm32_i2c_hw_config()
/u-boot/arch/powerpc/cpu/mpc8xx/
A Dstart.S367 cmplw cr1,r3,r4
370 beq cr1,4f /* In place copy is not necessary */
373 bge cr1,2f
/u-boot/arch/m68k/cpu/mcf5445x/
A Dpci.c85 out_be32(&pci->cr1, PCI_CR1_CLS(8) | PCI_CR1_LTMR(0xF8)); in pci_mcf5445x_init()
/u-boot/arch/m68k/cpu/mcf547x_8x/
A Dpci.c111 out_be32(&pci->cr1, PCI_CR1_CLS(8) | PCI_CR1_LTMR(0xf8)); in pci_mcf547x_8x_init()
/u-boot/arch/m68k/include/asm/
A Dimmap_547x_8x.h212 u32 cr1; /* 0x0c Configuration 1 */ member
A Dimmap_5445x.h248 u32 cr1; /* 0x0c Configuration 1 Register */ member
/u-boot/arch/powerpc/cpu/mpc86xx/
A Dstart.S681 cmplw cr1,r3,r4
684 beq cr1,4f /* In place copy is not necessary */
687 bge cr1,2f
/u-boot/arch/nds32/cpu/n1213/
A Dstart.S44 #define CR_ICAC_MEM $cr1 ! I-cache/memory config reg
317 ! read $cr1(I CAC/MEM cfg. reg.) configuration
/u-boot/drivers/clk/
A Dclk_stm32f.c240 setbits_le32(&pwr->cr1, PWR_CR1_ODEN); in configure_clocks()
245 setbits_le32(&pwr->cr1, PWR_CR1_ODSWEN); in configure_clocks()
/u-boot/arch/powerpc/cpu/mpc83xx/
A Dstart.S850 cmplw cr1,r3,r4
853 beq cr1,4f /* In place copy is not necessary */
856 bge cr1,2f
/u-boot/arch/powerpc/cpu/mpc85xx/
A Dstart.S1562 cmplw cr1,r3,r4
1565 beq cr1,4f /* In place copy is not necessary */
1568 bge cr1,2f

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