/u-boot/arch/arm/cpu/armv7/stv0991/ |
A D | timer.c | 38 writel(readl(&gpt1_regs_ptr->cr1) & ~GPT_CR1_CEN, &gpt1_regs_ptr->cr1); in timer_init() 41 writel(readl(&gpt1_regs_ptr->cr1) | GPT_MODE_AUTO_RELOAD, in timer_init() 42 &gpt1_regs_ptr->cr1); in timer_init() 48 writel(readl(&gpt1_regs_ptr->cr1) | GPT_CR1_CEN, in timer_init() 49 &gpt1_regs_ptr->cr1); in timer_init()
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/u-boot/drivers/timer/ |
A D | stm32_timer.c | 30 u32 cr1; member 94 clrbits_le32(®s->cr1, CR1_CEN); in stm32_timer_probe() 107 setbits_le32(®s->cr1, CR1_ARPE); in stm32_timer_probe() 113 setbits_le32(®s->cr1, CR1_CEN); in stm32_timer_probe()
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/u-boot/arch/arm/include/asm/arch-stm32f4/ |
A D | stm32_pwr.h | 23 u32 cr1; /* power control register 1 */ member
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/u-boot/arch/arm/include/asm/arch-stm32f7/ |
A D | stm32_pwr.h | 23 u32 cr1; /* power control register 1 */ member
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/u-boot/drivers/serial/ |
A D | serial_stm32.c | 63 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig() local 77 clrbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit)); in stm32_serial_setconfig() 97 clrsetbits_le32(cr1, in stm32_serial_setconfig() 101 setbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit)); in stm32_serial_setconfig()
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A D | serial_mxc.c | 123 u32 cr1; member 144 writel(0, &base->cr1); in _mxc_serial_init() 179 writel(UCR1_UARTEN, &base->cr1); in _mxc_serial_setbrg()
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/u-boot/arch/arm/include/asm/arch-stv0991/ |
A D | stv0991_gpt.h | 13 u32 cr1; member
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/u-boot/drivers/spi/ |
A D | stm32_spi.c | 230 u32 cr1, sr; in stm32_spi_stopxfer() local 235 cr1 = readl(priv->base + STM32_SPI_CR1); in stm32_spi_stopxfer() 237 if (!(cr1 & SPI_CR1_SPE)) in stm32_spi_stopxfer() 244 if (cr1 & SPI_CR1_CSTART) { in stm32_spi_stopxfer() 245 writel(cr1 | SPI_CR1_CSUSP, priv->base + STM32_SPI_CR1); in stm32_spi_stopxfer()
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/u-boot/arch/m68k/include/asm/coldfire/ |
A D | pwm.h | 17 u8 cr1; member
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/u-boot/include/faraday/ |
A D | ftsdmc021.h | 21 unsigned int cr1; /* 0x08 - SDRAM Configuration Reg 1 */ member
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/u-boot/arch/nds32/lib/ |
A D | asm-offsets.c | 47 OFFSET(FTSDMC021_CR1, ftsdmc021, cr1); in main()
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/u-boot/drivers/i2c/ |
A D | stm32f7_i2c.c | 25 u32 cr1; /* I2C control register 1 */ member 826 clrbits_le32(®s->cr1, STM32_I2C_CR1_PE); in stm32_i2c_hw_config() 843 clrbits_le32(®s->cr1, STM32_I2C_CR1_ANFOFF); in stm32_i2c_hw_config() 845 setbits_le32(®s->cr1, STM32_I2C_CR1_ANFOFF); in stm32_i2c_hw_config() 846 setbits_le32(®s->cr1, STM32_I2C_CR1_PE); in stm32_i2c_hw_config()
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/u-boot/arch/powerpc/cpu/mpc8xx/ |
A D | start.S | 367 cmplw cr1,r3,r4 370 beq cr1,4f /* In place copy is not necessary */ 373 bge cr1,2f
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/u-boot/arch/m68k/cpu/mcf5445x/ |
A D | pci.c | 85 out_be32(&pci->cr1, PCI_CR1_CLS(8) | PCI_CR1_LTMR(0xF8)); in pci_mcf5445x_init()
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/u-boot/arch/m68k/cpu/mcf547x_8x/ |
A D | pci.c | 111 out_be32(&pci->cr1, PCI_CR1_CLS(8) | PCI_CR1_LTMR(0xf8)); in pci_mcf547x_8x_init()
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/u-boot/arch/m68k/include/asm/ |
A D | immap_547x_8x.h | 212 u32 cr1; /* 0x0c Configuration 1 */ member
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A D | immap_5445x.h | 248 u32 cr1; /* 0x0c Configuration 1 Register */ member
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/u-boot/arch/powerpc/cpu/mpc86xx/ |
A D | start.S | 681 cmplw cr1,r3,r4 684 beq cr1,4f /* In place copy is not necessary */ 687 bge cr1,2f
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/u-boot/arch/nds32/cpu/n1213/ |
A D | start.S | 44 #define CR_ICAC_MEM $cr1 ! I-cache/memory config reg 317 ! read $cr1(I CAC/MEM cfg. reg.) configuration
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/u-boot/drivers/clk/ |
A D | clk_stm32f.c | 240 setbits_le32(&pwr->cr1, PWR_CR1_ODEN); in configure_clocks() 245 setbits_le32(&pwr->cr1, PWR_CR1_ODSWEN); in configure_clocks()
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/u-boot/arch/powerpc/cpu/mpc83xx/ |
A D | start.S | 850 cmplw cr1,r3,r4 853 beq cr1,4f /* In place copy is not necessary */ 856 bge cr1,2f
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/u-boot/arch/powerpc/cpu/mpc85xx/ |
A D | start.S | 1562 cmplw cr1,r3,r4 1565 beq cr1,4f /* In place copy is not necessary */ 1568 bge cr1,2f
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