Home
last modified time | relevance | path

Searched refs:cs0_bnds (Results 1 – 14 of 14) sorted by relevance

/u-boot/drivers/ddr/fsl/
A Dfsl_ddr_gen4.c71 u32 cs0_bnds, cs1_bnds, cs2_bnds, cs3_bnds, cs0_config; in fsl_ddr_set_memctl_regs() local
124 ddr_out32(&ddr->cs0_bnds, in fsl_ddr_set_memctl_regs()
130 ddr_out32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
532 ddr_out32(&ddr->cs0_bnds, regs->cs[0].bnds); in fsl_ddr_set_memctl_regs()
569 cs0_bnds = ddr_in32(&ddr->cs0_bnds); in fsl_ddr_set_memctl_regs()
575 ddr_out32(&ddr->cs0_bnds, (cs0_bnds & 0xfffefffe) >> 1); in fsl_ddr_set_memctl_regs()
615 ddr_out32(&ddr->cs0_bnds, cs0_bnds); in fsl_ddr_set_memctl_regs()
A Dmpc85xx_ddr_gen1.c30 out_be32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
A Dmpc86xx_ddr.c36 out_be32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
A Dmpc85xx_ddr_gen2.c50 out_be32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
A Darm_ddr_gen3.c72 ddr_out32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
A Dmpc85xx_ddr_gen3.c104 out_be32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
584 out_be32(&ddr->cs0_bnds, regs->cs[csn].bnds); in fsl_ddr_set_memctl_regs()
/u-boot/board/sbc8641d/
A Dsbc8641d.c105 ddr->cs0_bnds = CONFIG_SYS_DDR_CS0_BNDS; in fixed_sdram()
136 ddr->cs0_bnds = CONFIG_SYS_DDR2_CS0_BNDS; in fixed_sdram()
/u-boot/board/socrates/
A Dsdram.c37 ddr->cs0_bnds = CONFIG_SYS_DDR_CS0_BNDS; in fixed_sdram()
/u-boot/board/sbc8548/
A Dddr.c95 out_be32(&ddr->cs0_bnds, 0x0000007f); in fixed_sdram()
/u-boot/board/freescale/ls1021aiot/
A Dls1021aiot.c58 out_be32(&ddr->cs0_bnds, DDR_CS0_BNDS); in ddrmc_init()
/u-boot/board/freescale/ls1021atsn/
A Dls1021atsn.c36 out_be32(&ddr->cs0_bnds, DDR_CS0_BNDS); in ddrmc_init()
/u-boot/include/
A Dfsl_immap.h15 u32 cs0_bnds; /* Chip Select 0 Memory Bounds */ member
/u-boot/board/freescale/ls1021atwr/
A Dls1021atwr.c152 out_be32(&ddr->cs0_bnds, DDR_CS0_BNDS); in ddrmc_init()
/u-boot/doc/
A DREADME.fsl-ddr404 FSL DDR>edit c0 regs cs0_bnds 0x000000FF

Completed in 12 milliseconds