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Searched refs:cs_bitmask (Results 1 – 6 of 6) sorted by relevance

/u-boot/drivers/ddr/marvell/a38x/
A Dddr_topology_def.h24 u8 cs_bitmask; member
A Dmv_ddr_topology.c86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
221 VALIDATE_ACTIVE(iface_params->as_bus_params[sphy].cs_bitmask, cs); in mv_ddr_cs_num_get()
A Dddr3_training.c486 as_bus_params[bus_cnt].cs_bitmask; in hws_ddr3_tip_init_controller()
688 cs_bitmask; in ddr3_tip_rev2_rank_control()
697 cs_bitmask & 0x1) != 0) { in ddr3_tip_rev2_rank_control()
704 cs_bitmask & 0x2) != 0) { in ddr3_tip_rev2_rank_control()
711 cs_bitmask & 0x4) != 0) { in ddr3_tip_rev2_rank_control()
718 cs_bitmask & 0x8) != 0) { in ddr3_tip_rev2_rank_control()
742 as_bus_params[0].cs_bitmask != in ddr3_tip_rev3_rank_control()
755 as_bus_params[0].cs_bitmask; in ddr3_tip_rev3_rank_control()
1780 cs_bitmask = in ddr3_tip_write_cs_result()
1782 as_bus_params[bus_num].cs_bitmask; in ddr3_tip_write_cs_result()
[all …]
A Dddr3_training_leveling.c787 as_bus_params[bus_cnt].cs_bitmask; in ddr3_tip_calc_cs_mask()
789 as_bus_params[bus_cnt].cs_bitmask; in ddr3_tip_calc_cs_mask()
793 as_bus_params[bus_cnt].cs_bitmask; in ddr3_tip_calc_cs_mask()
A Dmv_ddr_plat.c1157 cs_ena = tm->interface_params[0].as_bus_params[0].cs_bitmask; in ddr3_save_and_set_training_windows()
A Dddr3_debug.c1317 as_bus_params[uj].cs_bitmask); in print_topology()

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