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Searched refs:csr (Results 1 – 25 of 43) sorted by relevance

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/u-boot/drivers/usb/musb/
A Dmusb_hcd.c42 u16 csr; in write_toggle() local
50 csr = 0; in write_toggle()
83 u16 csr; in check_stall() local
119 u16 csr; in wait_until_ep0_ready() local
182 u16 csr; in wait_until_txep_ready() local
214 u16 csr; in wait_until_rxep_ready() local
247 u16 csr; in ctrlreq_setup_phase() local
268 u16 csr; in ctrlreq_in_data_phase() local
314 u16 csr; in ctrlreq_out_data_phase() local
349 u16 csr; in ctrlreq_out_status_phase() local
[all …]
A Dmusb_core.c68 u16 csr; in musb_configure_ep() local
83 csr = readw(&musbr->txcsr); in musb_configure_ep()
85 writew(csr | MUSB_TXCSR_CLRDATATOG, &musbr->txcsr); in musb_configure_ep()
87 if (csr & MUSB_TXCSR_TXPKTRDY) in musb_configure_ep()
88 writew(csr | MUSB_TXCSR_FLUSHFIFO, in musb_configure_ep()
94 csr = readw(&musbr->rxcsr); in musb_configure_ep()
96 writew(csr | MUSB_RXCSR_CLRDATATOG, &musbr->rxcsr); in musb_configure_ep()
98 if (csr & MUSB_RXCSR_RXPKTRDY) in musb_configure_ep()
99 writew(csr | MUSB_RXCSR_FLUSHFIFO, in musb_configure_ep()
/u-boot/arch/riscv/include/asm/
A Dcsr.h149 #define csr_swap(csr, val) \ argument
158 #define csr_read(csr) \ argument
161 __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \
167 #define csr_write(csr, val) \ argument
170 __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \
175 #define csr_read_set(csr, val) \ argument
184 #define csr_set(csr, val) \ argument
187 __asm__ __volatile__ ("csrs " __ASM_STR(csr) ", %0" \
192 #define csr_read_clear(csr, val) \ argument
201 #define csr_clear(csr, val) \ argument
[all …]
/u-boot/drivers/usb/musb-new/
A Dmusb_gadget_ep0.c249 u16 csr; in service_zero_data_request() local
413 u16 csr; in service_zero_data_request() local
475 u16 count, csr; in ep0_rxstate() local
509 musb->ackpend = csr; in ep0_rxstate()
554 csr |= MUSB_CSR0_P_DATAEND; in ep0_txstate()
568 musb->ackpend = csr; in ep0_txstate()
651 u16 csr; in musb_g_ep0_irq() local
662 csr, len, in musb_g_ep0_irq()
853 handled, csr, in musb_g_ep0_irq()
1007 u16 csr; in musb_g_ep0_halt() local
[all …]
A Dmusb_gadget.c325 u16 fifo_count = 0, csr; in txstate() local
364 csr); in txstate()
426 | csr); in txstate()
493 u16 csr; in musb_g_tx() local
912 u16 csr; in musb_g_rx() local
978 epnum, csr, in musb_g_rx()
1042 u16 csr; in musb_gadget_enable() local
1127 csr |= MUSB_TXCSR_P_ISO; in musb_gadget_enable()
1171 csr |= MUSB_RXCSR_P_ISO; in musb_gadget_enable()
1441 u16 csr; in musb_gadget_set_halt() local
[all …]
A Dmusb_host.c98 u16 csr; in musb_h_tx_flush_fifo() local
106 lastcsr = csr; in musb_h_tx_flush_fifo()
121 u16 csr; in musb_h_ep0_flush_fifo() local
322 u16 csr; in musb_save_toggle() local
458 u16 csr; in musb_host_packet_rx() local
561 u16 csr; in musb_rx_reinit() local
628 u16 csr; in musb_tx_dma_program() local
729 u16 csr; in musb_ep_program() local
827 u16 csr; in musb_ep_program() local
837 csr = 0; in musb_ep_program()
[all …]
/u-boot/drivers/watchdog/
A Dxilinx_wwdt.c54 u32 csr; in xlnx_wwdt_stop() local
63 regmap_read(wdt->regs, XWT_WWCSR_OFFSET, &csr); in xlnx_wwdt_stop()
64 csr &= ~(XWT_WWCSR_GWEN_MASK); in xlnx_wwdt_stop()
65 regmap_write(wdt->regs, XWT_WWCSR_OFFSET, csr); in xlnx_wwdt_stop()
77 u32 csr; in xlnx_wwdt_start() local
107 regmap_read(wdt->regs, XWT_WWCSR_OFFSET, &csr); in xlnx_wwdt_start()
108 csr &= ~(XWT_WWCSR_GWEN_MASK); in xlnx_wwdt_start()
109 regmap_write(wdt->regs, XWT_WWCSR_OFFSET, csr); in xlnx_wwdt_start()
117 regmap_read(wdt->regs, XWT_WWCSR_OFFSET, &csr); in xlnx_wwdt_start()
118 csr |= (XWT_WWCSR_GWEN_MASK); in xlnx_wwdt_start()
[all …]
/u-boot/drivers/usb/gadget/
A Dat91_udc.c128 u32 csr; in read_fifo() local
155 csr |= CLR_FX; in read_fifo()
221 csr |= CLR_FX; in write_fifo()
255 csr &= ~SET_FX; in write_fifo()
550 u32 csr; in at91_ep_set_halt() local
570 csr |= CLR_FX; in at91_ep_set_halt()
877 csr |= CLR_FX; in handle_setup()
900 csr |= CLR_FX; in handle_setup()
901 csr &= ~SET_FX; in handle_setup()
1087 csr |= CLR_FX; in handle_ep0()
[all …]
/u-boot/drivers/serial/
A Datmel_usart.c54 if (!(readl(&usart->csr) & USART3_BIT(TXEMPTY))) in atmel_serial_init_internal()
97 while (!(readl(&usart->csr) & USART3_BIT(TXRDY))); in atmel_serial_putc()
105 while (!(readl(&usart->csr) & USART3_BIT(RXRDY))) in atmel_serial_getc()
113 return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0; in atmel_serial_tstc()
188 if (!(readl(&priv->usart->csr) & USART3_BIT(RXRDY))) in atmel_serial_getc()
198 if (!(readl(&priv->usart->csr) & USART3_BIT(TXRDY))) in atmel_serial_putc()
209 uint32_t csr = readl(&priv->usart->csr); in atmel_serial_pending() local
212 return csr & USART3_BIT(RXRDY) ? 1 : 0; in atmel_serial_pending()
214 return csr & USART3_BIT(TXEMPTY) ? 0 : 1; in atmel_serial_pending()
331 while (!(readl(&usart->csr) & USART3_BIT(TXRDY))) in _debug_uart_putc()
/u-boot/drivers/usb/mtu3/
A Dmtu3_gadget_ep0.c161 u32 csr; in ep0_stall_set() local
166 csr |= EP0_SENDSTALL | pktrdy; in ep0_stall_set()
168 csr = (csr & ~EP0_SENDSTALL) | EP0_SENTSTALL; in ep0_stall_set()
537 u32 csr; in ep0_rx_state() local
559 csr |= EP0_RXPKTRDY; in ep0_rx_state()
567 csr |= EP0_DATAEND; in ep0_rx_state()
588 u32 csr; in ep0_tx_state() local
628 u32 csr; in ep0_read_setup() local
722 u32 csr; in mtu3_ep0_isr() local
742 if (csr & EP0_SENTSTALL) { in mtu3_ep0_isr()
[all …]
A Dmtu3_core.c235 u32 csr; in mtu3_ep_stall_set() local
240 csr |= TX_SENDSTALL; in mtu3_ep_stall_set()
242 csr = (csr & (~TX_SENDSTALL)) | TX_SENTSTALL; in mtu3_ep_stall_set()
247 csr |= RX_SENDSTALL; in mtu3_ep_stall_set()
249 csr = (csr & (~RX_SENDSTALL)) | RX_SENTSTALL; in mtu3_ep_stall_set()
482 u32 csr; in mtu3_ep0_setup() local
486 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR); in mtu3_ep0_setup()
487 csr &= ~EP0_MAXPKTSZ_MSK; in mtu3_ep0_setup()
488 csr |= EP0_MAXPKTSZ(maxpacket); in mtu3_ep0_setup()
489 csr &= EP0_W1C_BITS; in mtu3_ep0_setup()
[all …]
/u-boot/drivers/i2c/
A Dast_i2c.c151 writel(I2CD_M_STOP_CMD, &priv->regs->csr); in ast_i2c_send_stop()
187 writel(I2CD_M_START_CMD | I2CD_M_TX_CMD, &priv->regs->csr); in ast_i2c_start_txn()
206 writel(i2c_cmd, &priv->regs->csr); in ast_i2c_read_data()
233 writel(I2CD_M_TX_CMD, &priv->regs->csr); in ast_i2c_write_data()
249 u32 csr = readl(&regs->csr); in ast_i2c_deblock() local
250 bool sda_high = csr & I2CD_SDA_LINE_STS; in ast_i2c_deblock()
251 bool scl_high = csr & I2CD_SCL_LINE_STS; in ast_i2c_deblock()
259 debug("Unterminated TXN in (%x), sending stop\n", csr); in ast_i2c_deblock()
263 debug("Bus stuck (%x), attempting recovery\n", csr); in ast_i2c_deblock()
264 writel(I2CD_BUS_RECOVER_CMD, &regs->csr); in ast_i2c_deblock()
A Dfsl_i2c.c312 u32 csr; in i2c_wait() local
317 csr = readb(&base->sr); in i2c_wait()
318 if (!(csr & I2C_SR_MIF)) in i2c_wait()
321 csr = readb(&base->sr); in i2c_wait()
325 if (csr & I2C_SR_MAL) { in i2c_wait()
330 if (!(csr & I2C_SR_MCF)) { in i2c_wait()
335 if (write == I2C_WRITE_BIT && (csr & I2C_SR_RXAK)) { in i2c_wait()
A Dast_i2c.h16 u32 csr; member
/u-boot/drivers/net/
A Daltera_tse.c269 static void msgdma_reset(struct msgdma_csr *csr) in msgdma_reset() argument
275 writel(MSGDMA_CSR_STAT_MASK, &csr->status); in msgdma_reset()
276 writel(MSGDMA_CSR_CTL_RESET, &csr->control); in msgdma_reset()
279 status = readl(&csr->status); in msgdma_reset()
288 writel(MSGDMA_CSR_STAT_MASK, &csr->status); in msgdma_reset()
291 static u32 msgdma_wait(struct msgdma_csr *csr) in msgdma_wait() argument
299 status = readl(&csr->status); in msgdma_wait()
308 writel(MSGDMA_CSR_STAT_MASK, &csr->status); in msgdma_wait()
339 struct msgdma_csr *csr = priv->sgdma_rx; in altera_tse_recv_msgdma() local
343 level = readl(&csr->resp_fill_level); in altera_tse_recv_msgdma()
/u-boot/board/freescale/common/
A Dpixis.h14 u8 csr; member
A Dngpixis.h17 u8 csr; member
/u-boot/arch/arm/mach-at91/include/mach/
A Dat91_mc.h44 u32 csr[8]; /* 0x00 SDRAMC Mode Register */ member
A Dat91_spi.h27 u32 csr[4]; /* 0x30 Chip Select Register 0-3 */ member
/u-boot/include/
A Dstm32_rcc.h86 u32 csr; /* RCC clock control & status */ member
/u-boot/arch/nds32/lib/
A Dasm-offsets.c63 OFFSET(DWCDDR21MCTL_CSR, dwcddr21mctl, csr); /* 0x0c */ in main()
/u-boot/arch/m68k/include/asm/coldfire/
A Dedma.h67 u16 csr; /* 0x1E Control and Status */ member
/u-boot/drivers/sound/
A Dbroadwell_i2s.h44 u32 csr; /* 0x00 */ member
/u-boot/arch/arm/include/asm/arch-sunxi/
A Ddram_sun4i.h18 u32 csr; /* 0x0c controller status register */ member
/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
A Dfsl_lsch3_speed.c124 c_pll_sel = (in_le32(&clk_ctrl->clkcncsr[cluster].csr) >> 27) in get_sys_info()

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