Searched refs:ctrl_base (Results 1 – 11 of 11) sorted by relevance
/u-boot/board/compulab/common/ |
A D | omap3_smc911x.c | 33 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; in cl_omap3_smc911x_setup_net_chip_gmpc() local 39 writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); in cl_omap3_smc911x_setup_net_chip_gmpc() 42 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); in cl_omap3_smc911x_setup_net_chip_gmpc() 45 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, in cl_omap3_smc911x_setup_net_chip_gmpc() 46 &ctrl_base->gpmc_nadv_ale); in cl_omap3_smc911x_setup_net_chip_gmpc()
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/u-boot/board/ti/evm/ |
A D | evm.c | 199 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; in setup_net_chip() local 211 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); in setup_net_chip() 213 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); in setup_net_chip() 215 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, in setup_net_chip() 216 &ctrl_base->gpmc_nadv_ale); in setup_net_chip()
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/u-boot/drivers/pci/ |
A D | pcie_dw_mvebu.c | 112 void *ctrl_base; member 149 pcie->ctrl_base + PCIE_ATU_VIEWPORT); in pcie_dw_prog_outbound_atu() 153 pcie->ctrl_base + PCIE_ATU_LIMIT); in pcie_dw_prog_outbound_atu() 155 pcie->ctrl_base + PCIE_ATU_LOWER_TARGET); in pcie_dw_prog_outbound_atu() 157 pcie->ctrl_base + PCIE_ATU_UPPER_TARGET); in pcie_dw_prog_outbound_atu() 158 writel(type, pcie->ctrl_base + PCIE_ATU_CR1); in pcie_dw_prog_outbound_atu() 197 va_address = (uintptr_t)pcie->ctrl_base; in set_cfg_address() 511 pcie_dw_get_link_speed(pcie->ctrl_base), in pcie_dw_mvebu_probe() 512 pcie_dw_get_link_width(pcie->ctrl_base), in pcie_dw_mvebu_probe() 533 pcie_dw_set_host_bars(pcie->ctrl_base); in pcie_dw_mvebu_probe() [all …]
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/u-boot/board/isee/igep00x0/ |
A D | igep00x0.c | 111 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; in setup_net_chip() local 125 writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); in setup_net_chip() 127 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); in setup_net_chip() 129 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, in setup_net_chip() 130 &ctrl_base->gpmc_nadv_ale); in setup_net_chip()
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/u-boot/arch/arm/mach-omap2/omap3/ |
A D | boot.c | 47 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; in omap_sys_boot_device() local 51 sys_boot = readl(&ctrl_base->status) & ((1 << 5) - 1); in omap_sys_boot_device()
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A D | sys_info.c | 25 static struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; variable 60 return readl(&ctrl_base->ctrl_omap_stat); in get_cpu_type() 236 return (readl(&ctrl_base->status) & SYSBOOT_MASK); in get_boot_type()
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/u-boot/drivers/usb/musb-new/ |
A D | da8xx.c | 70 void __iomem *reg_base = musb->ctrl_base; in da8xx_musb_interrupt() 157 void __iomem *reg_base = musb->ctrl_base; in da8xx_musb_init() 199 void __iomem *reg_base = musb->ctrl_base; in da8xx_musb_enable() 220 void __iomem *reg_base = musb->ctrl_base; in da8xx_musb_disable()
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A D | am35x.c | 98 void __iomem *reg_base = musb->ctrl_base; in am35x_musb_enable() 122 void __iomem *reg_base = musb->ctrl_base; in am35x_musb_disable() 175 musb_writel(musb->ctrl_base, CORE_INTR_SRC_SET_REG, in otg_timer() 230 void __iomem *reg_base = musb->ctrl_base; in am35x_musb_interrupt() 385 void __iomem *reg_base = musb->ctrl_base; in am35x_musb_init()
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A D | musb_dsps.c | 162 void __iomem *reg_base = musb->ctrl_base; in dsps_musb_enable() 192 void __iomem *reg_base = musb->ctrl_base; in dsps_musb_disable() 239 dsps_writel(musb->ctrl_base, wrp->coreintr_set, in otg_timer() 299 void __iomem *reg_base = musb->ctrl_base; in dsps_interrupt() 426 void __iomem *reg_base = musb->ctrl_base; in dsps_musb_init() 465 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); in dsps_musb_init()
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A D | musb_core.h | 355 void __iomem *ctrl_base; member
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A D | musb_core.c | 1866 musb->ctrl_base = mbase; in allocate_instance() 2214 void __iomem *ctrl_base = musb->ctrl_base; in musb_remove() local 2225 iounmap(ctrl_base); in musb_remove()
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