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Searched refs:curr_domain (Results 1 – 1 of 1) sorted by relevance

/u-boot/drivers/clk/
A Dclk-hsdk-cgu.c254 struct hsdk_cgu_domain curr_domain; member
369 iowrite32(val, clk->curr_domain.idiv_regs); in hsdk_idiv_write()
374 return ioread32(clk->curr_domain.idiv_regs); in hsdk_idiv_read()
379 iowrite32(val, clk->curr_domain.pll_regs + reg); in hsdk_pll_write()
384 return ioread32(clk->curr_domain.pll_regs + reg); in hsdk_pll_read()
389 iowrite32(val, clk->curr_domain.spec_regs + reg); in hsdk_pll_spcwrite()
394 return ioread32(clk->curr_domain.spec_regs + reg); in hsdk_pll_spcread()
429 u32 parent_rate = clk->curr_domain.pll->parent_rate; in pll_get()
537 const struct hsdk_pll_devdata *pll = clk->curr_domain.pll; in pll_set()
693 clk->curr_domain.pll = clk->map[sclk->id].pll_devdata; in hsdk_prepare_clock_tree_branch()
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