Searched refs:data_value (Results 1 – 5 of 5) sorted by relevance
| /u-boot/drivers/ddr/marvell/a38x/ |
| A D | ddr3_training_ip_flow.h | 68 u32 if_id, u32 reg_addr, u32 data_value, u32 mask);
78 u32 reg_addr, u32 data_value, u32 reg_mask);
85 u32 data_value);
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| A D | ddr3_training.c | 463 data_value = 0x7; in hws_ddr3_tip_init_controller()
475 data_value = in hws_ddr3_tip_init_controller()
527 data_value = in hws_ddr3_tip_init_controller()
555 data_value |= in hws_ddr3_tip_init_controller()
559 data_value |= g_rtt_wr; in hws_ddr3_tip_init_controller()
625 data_value = in hws_ddr3_tip_init_controller()
728 data_value, 0xff)); in ddr3_tip_rev2_rank_control()
761 data_value, 0xff)); in ddr3_tip_rev3_rank_control()
1082 u32 data_value) in ddr3_tip_bus_write() argument
1113 data_value = (data_val & (~reg_mask)) | (data_value & reg_mask); in ddr3_tip_bus_read_modify_write()
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| A D | ddr3_debug.c | 113 u32 if_id, reg_addr, data_value, bus_id; in ddr3_tip_reg_dump() local
145 &data_value)); in ddr3_tip_reg_dump()
146 printf("0x%x ", data_value); in ddr3_tip_reg_dump()
156 &data_value)); in ddr3_tip_reg_dump()
157 printf("0x%x ", data_value); in ddr3_tip_reg_dump()
675 u32 data_value; in ddr3_tip_read_adll_value() local
693 &data_value)); in ddr3_tip_read_adll_value()
696 data_value & mask; in ddr3_tip_read_adll_value()
744 u32 data_value; in read_phase_value() local
758 &data_value)); in read_phase_value()
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| A D | ddr3_training_pbs.c | 942 u32 data_value = 0, bit = 0, if_id = 0, pup = 0; in ddr3_tip_print_pbs_result() local
975 &data_value)); in ddr3_tip_print_pbs_result()
976 printf("%d , ", data_value); in ddr3_tip_print_pbs_result()
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| A D | ddr3_training_ip_engine.c | 631 u32 data_value = 0; in ddr3_tip_configure_odpg() local
634 data_value = ((single_pattern << 2) | (tx_phases << 5) | in ddr3_tip_configure_odpg()
639 ODPG_DATA_CTRL_REG, data_value, 0xaffffffc); in ddr3_tip_configure_odpg()
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