Searched refs:dcache (Results 1 – 22 of 22) sorted by relevance
/u-boot/doc/device-tree-bindings/cpu/ |
A D | nios2.txt | 15 - dcache-line-size: Contains data cache line size. 17 - dcache-size: Contains data cache size. 38 dcache-line-size = <32>; 40 dcache-size = <32768>;
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/u-boot/arch/xtensa/ |
A D | Kconfig | 33 bool "Do not enable dcache" 39 bool "Do not enable dcache in SPL"
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/u-boot/arch/nds32/ |
A D | Kconfig | 33 bool "Do not enable dcache" 39 bool "Do not enable dcache in SPL"
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/u-boot/cmd/ |
A D | cache.c | 113 dcache, 2, 1, do_dcache,
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A D | Kconfig | 1689 bool "icache or dcache" 1691 Enable the "icache" and "dcache" commands
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/u-boot/common/ |
A D | bootm_os.c | 389 int dcache; in do_bootm_qnxelf() local 408 dcache = dcache_status(); in do_bootm_qnxelf() 409 if (dcache) in do_bootm_qnxelf() 414 if (dcache) in do_bootm_qnxelf()
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/u-boot/board/synopsys/hsdk/ |
A D | hsdk.c | 93 u32_env dcache; member 129 u32 dcache; member 145 { "dcache_ena", ENV_HEX, true, 0, 1, &env_common.dcache }, 257 value = env_common.dcache.val; in sync_cross_cpu_data() 258 arc_write_uncached_32(&cross_cpu_data.dcache, value); in sync_cross_cpu_data() 287 if (arc_read_uncached_32(&cross_cpu_data.dcache)) in init_slave_cpu_func() 362 if (!env_common.dcache.val) in init_master_dcache() 366 if (env_common.dcache.val) in init_master_dcache()
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/u-boot/arch/nios2/dts/ |
A D | 3c120_devboard.dts | 27 dcache-line-size = <32>; 29 dcache-size = <32768>;
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A D | 10m50_devboard.dts | 40 dcache-line-size = <32>; 41 dcache-size = <32768>;
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/u-boot/arch/arc/ |
A D | Kconfig | 125 bool "Do not enable dcache" 131 bool "Do not enable dcache in SPL"
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/u-boot/arch/arm/mach-omap2/omap5/ |
A D | sec_entry_cpu1.S | 85 add r1, r0, r1 @ dcache is not enabled on CPU1, so
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/u-boot/arch/ |
A D | Kconfig | 313 This option disables dcache flush and dcache invalidation
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/u-boot/arch/riscv/ |
A D | Kconfig | 42 bool "Do not enable dcache" 48 bool "Do not enable dcache in SPL"
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/u-boot/arch/arm/cpu/armv8/ |
A D | cache_v8.c | 673 #error Please describe your MMU layout in CONFIG_SYS_MEM_MAP and enable dcache.
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/u-boot/board/freescale/m52277evb/ |
A D | README | 197 dcache - enable or disable data cache
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/u-boot/doc/ |
A D | README.m54418twr | 205 dcache - enable or disable data cache
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/u-boot/board/freescale/m547xevb/ |
A D | README | 228 dcache - enable or disable data cache
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/u-boot/board/freescale/m5373evb/ |
A D | README | 208 dcache - enable or disable data cache
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/u-boot/board/freescale/m54455evb/ |
A D | README | 289 dcache - enable or disable data cache
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/u-boot/tools/buildman/ |
A D | README | 524 d92aff7 lcd: Add support for flushing LCD fb from dcache after update 583 12: lcd: Add support for flushing LCD fb from dcache after update 608 12: lcd: Add support for flushing LCD fb from dcache after update 631 12: lcd: Add support for flushing LCD fb from dcache after update
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/u-boot/arch/arm/ |
A D | Kconfig | 115 bool "Do not enable dcache" 121 bool "Do not enable dcache in SPL"
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/u-boot/ |
A D | README | 3163 dcache - enable or disable data cache
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