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Searched refs:ddr2v5 (Results 1 – 1 of 1) sorted by relevance

/u-boot/arch/arm/cpu/arm926ejs/spear/
A Dspear600.c32 u32 ddr1v8, ddr2v5; in sel_1v8() local
34 ddr2v5 = readl(&misc_p->ddr_2v5_compensation); in sel_1v8()
35 ddr2v5 &= 0x8080ffc0; in sel_1v8()
36 ddr2v5 |= 0x78000003; in sel_1v8()
37 writel(ddr2v5, &misc_p->ddr_2v5_compensation); in sel_1v8()
51 u32 ddr1v8, ddr2v5; in sel_2v5() local
59 ddr2v5 &= 0x8080ffc0; in sel_2v5()
60 ddr2v5 |= 0x78000010; in sel_2v5()
74 u32 core3v3, ddr1v8, ddr2v5; in plat_ddr_init() local
101 ddr2v5 &= 0x8080ffc0; in plat_ddr_init()
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