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Searched refs:ddr_dram_fsp_msg (Results 1 – 12 of 12) sorted by relevance

/u-boot/board/google/imx8mq_phanbell/
A Dlpddr4_timing_1g.c1694 static struct dram_fsp_msg ddr_dram_fsp_msg[] = { variable
1724 .fsp_msg = ddr_dram_fsp_msg,
1725 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
/u-boot/board/technexion/pico-imx8mq/
A Dlpddr4_timing_1gb.c1696 static struct dram_fsp_msg ddr_dram_fsp_msg[] = { variable
1726 .fsp_msg = ddr_dram_fsp_msg,
1727 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
A Dlpddr4_timing_2gb.c1696 static struct dram_fsp_msg ddr_dram_fsp_msg[] = { variable
1726 .fsp_msg = ddr_dram_fsp_msg,
1727 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
A Dlpddr4_timing_3gb.c1696 static struct dram_fsp_msg ddr_dram_fsp_msg[] = { variable
1726 .fsp_msg = ddr_dram_fsp_msg,
1727 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
A Dlpddr4_timing_4gb.c1696 static struct dram_fsp_msg ddr_dram_fsp_msg[] = { variable
1726 .fsp_msg = ddr_dram_fsp_msg,
1727 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
/u-boot/board/beacon/imx8mn/
A Dlpddr4_2g_timing.c1396 struct dram_fsp_msg ddr_dram_fsp_msg[] = { variable
1433 .fsp_msg = ddr_dram_fsp_msg,
1434 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
A Dlpddr4_timing.c1389 struct dram_fsp_msg ddr_dram_fsp_msg[] = { variable
1426 .fsp_msg = ddr_dram_fsp_msg,
1427 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
/u-boot/board/phytec/phycore_imx8mm/
A Dlpddr4_timing.c1802 static struct dram_fsp_msg ddr_dram_fsp_msg[] = { variable
1839 .fsp_msg = ddr_dram_fsp_msg,
1840 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
/u-boot/board/phytec/phycore_imx8mp/
A Dlpddr4_timing.c1805 static struct dram_fsp_msg ddr_dram_fsp_msg[] = { variable
1842 .fsp_msg = ddr_dram_fsp_msg,
1843 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
/u-boot/board/freescale/imx8mn_evk/
A Dddr4_timing.c1169 struct dram_fsp_msg ddr_dram_fsp_msg[] = { variable
1206 .fsp_msg = ddr_dram_fsp_msg,
1207 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
/u-boot/board/freescale/imx8mp_evk/
A Dlpddr4_timing.c1804 struct dram_fsp_msg ddr_dram_fsp_msg[] = { variable
1841 .fsp_msg = ddr_dram_fsp_msg,
1842 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
/u-boot/board/toradex/verdin-imx8mm/
A Dlpddr4_timing.c1806 struct dram_fsp_msg ddr_dram_fsp_msg[] = { variable
1843 .fsp_msg = ddr_dram_fsp_msg,
1844 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),

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