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Searched refs:ddr_fsp2_cfg (Results 1 – 7 of 7) sorted by relevance

/u-boot/board/beacon/imx8mn/
A Dlpddr4_2g_timing.c754 struct dram_cfg_param ddr_fsp2_cfg[] = { variable
1415 .fsp_cfg = ddr_fsp2_cfg,
1416 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg),
A Dlpddr4_timing.c751 struct dram_cfg_param ddr_fsp2_cfg[] = { variable
1408 .fsp_cfg = ddr_fsp2_cfg,
1409 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg),
/u-boot/board/phytec/phycore_imx8mm/
A Dlpddr4_timing.c1127 static struct dram_cfg_param ddr_fsp2_cfg[] = { variable
1821 .fsp_cfg = ddr_fsp2_cfg,
1822 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg),
/u-boot/board/phytec/phycore_imx8mp/
A Dlpddr4_timing.c1132 static struct dram_cfg_param ddr_fsp2_cfg[] = { variable
1824 .fsp_cfg = ddr_fsp2_cfg,
1825 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg),
/u-boot/board/freescale/imx8mn_evk/
A Dddr4_timing.c881 struct dram_cfg_param ddr_fsp2_cfg[] = { variable
1188 .fsp_cfg = ddr_fsp2_cfg,
1189 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg),
/u-boot/board/freescale/imx8mp_evk/
A Dlpddr4_timing.c1131 struct dram_cfg_param ddr_fsp2_cfg[] = { variable
1823 .fsp_cfg = ddr_fsp2_cfg,
1824 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg),
/u-boot/board/toradex/verdin-imx8mm/
A Dlpddr4_timing.c1131 struct dram_cfg_param ddr_fsp2_cfg[] = { variable
1825 .fsp_cfg = ddr_fsp2_cfg,
1826 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg),

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