Searched refs:ddr_out32 (Results 1 – 6 of 6) sorted by relevance
| /u-boot/drivers/ddr/fsl/ |
| A D | fsl_ddr_gen4.c | 29 ddr_out32(ptr, value); in set_wait_for_bits_clear()
124 ddr_out32(&ddr->cs0_bnds, in fsl_ddr_set_memctl_regs()
126 ddr_out32(&ddr->cs0_config, in fsl_ddr_set_memctl_regs()
137 ddr_out32(&ddr->cs1_bnds, in fsl_ddr_set_memctl_regs()
147 ddr_out32(&ddr->cs2_bnds, in fsl_ddr_set_memctl_regs()
157 ddr_out32(&ddr->cs3_bnds, in fsl_ddr_set_memctl_regs()
229 ddr_out32(&ddr->sdram_cfg_2, in fsl_ddr_set_memctl_regs()
235 ddr_out32(&ddr->ddr_cdr2, in fsl_ddr_set_memctl_regs()
272 ddr_out32(&ddr->ddr_cdr2, in fsl_ddr_set_memctl_regs()
283 ddr_out32(&ddr->ddr_cdr2, in fsl_ddr_set_memctl_regs()
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| A D | arm_ddr_gen3.c | 69 ddr_out32(&ddr->eor, regs->ddr_eor); in fsl_ddr_set_memctl_regs()
72 ddr_out32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
77 ddr_out32(&ddr->cs1_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
82 ddr_out32(&ddr->cs2_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
87 ddr_out32(&ddr->cs3_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
128 ddr_out32(&ddr->ddr_cdr1, regs->ddr_cdr1); in fsl_ddr_set_memctl_regs()
131 ddr_out32(&ddr->sdram_cfg_2, in fsl_ddr_set_memctl_regs()
137 ddr_out32(&ddr->ddr_cdr2, in fsl_ddr_set_memctl_regs()
145 ddr_out32(&ddr->ddr_cdr2, regs->ddr_cdr2); in fsl_ddr_set_memctl_regs()
153 ddr_out32(&ddr->debug[i], regs->debug[i]); in fsl_ddr_set_memctl_regs()
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| A D | util.c | 388 ddr_out32(ddrc_debug2_p[i], ddrc_debug2[i]); in fsl_ddr_sync_memctl_refresh()
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| A D | mpc85xx_ddr_gen3.c | 360 ddr_out32(&ddr->debug[28], val32); in fsl_ddr_set_memctl_regs()
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| /u-boot/include/ |
| A D | fsl_ddr.h | 24 #define ddr_out32(a, v) out_le32(a, v) macro
30 #define ddr_out32(a, v) out_be32(a, v) macro
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| /u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
| A D | soc.c | 473 ddr_out32(&ddr->eor, DDR_EOR_RD_REOD_DIS | DDR_EOR_WD_REOD_DIS); in erratum_a008850_early()
496 ddr_out32(&ddr->eor, tmp); in erratum_a008850_post()
588 ddr_out32(&ddr->ddr_cdr1, tmp); in ddr_enable_0v9_volt()
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