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Searched refs:ddr_phyctrl1_shdw (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-omap2/omap3/
A Demif4.c72 writel(regval, &emif4_base->ddr_phyctrl1_shdw); in do_emif4_init()
/u-boot/arch/arm/include/asm/arch-omap3/
A Dcpu.h170 unsigned int ddr_phyctrl1_shdw; member

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