ddr_pll_ratio (reference) in projects: u-boot

Searched refs:ddr_pll_ratio (Results 1 – 1 of 1) sorted by relevance

/u-boot/arch/powerpc/cpu/mpc85xx/
A D	cpu_init.c	379 u32 ddr_pll_ratio; in fsl_erratum_a007212_workaround() local 397 ddr_pll_ratio = (in_be32(&gur->rcwsr[0]) >> in fsl_erratum_a007212_workaround() 401 if (ddr_pll_ratio != 0) in fsl_erratum_a007212_workaround() 403 ddr_pll_ratio = (in_be32(&gur->rcwsr[0]) >> in fsl_erratum_a007212_workaround() 407 if (ddr_pll_ratio == 0) { in fsl_erratum_a007212_workaround() 411 ddr_pll_ratio >>= 1; in fsl_erratum_a007212_workaround() 421 out_be32(plldgdcr1, 0x08000001 \| (ddr_pll_ratio << 1)); in fsl_erratum_a007212_workaround() 423 out_be32(plldgdcr2, 0x08000001 \| (ddr_pll_ratio << 1)); in fsl_erratum_a007212_workaround() 425 out_be32(plldgdcr3, 0x08000001 \| (ddr_pll_ratio << 1)); in fsl_erratum_a007212_workaround()

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