Searched refs:ddr_wrlvl_cntl_2 (Results 1 – 12 of 12) sorted by relevance
/u-boot/drivers/ddr/fsl/ |
A D | arm_ddr_gen3.c | 119 if (regs->ddr_wrlvl_cntl_2) in fsl_ddr_set_memctl_regs() 120 ddr_out32(&ddr->ddr_wrlvl_cntl_2, regs->ddr_wrlvl_cntl_2); in fsl_ddr_set_memctl_regs()
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A D | mpc85xx_ddr_gen3.c | 151 if (regs->ddr_wrlvl_cntl_2) in fsl_ddr_set_memctl_regs() 152 out_be32(&ddr->ddr_wrlvl_cntl_2, regs->ddr_wrlvl_cntl_2); in fsl_ddr_set_memctl_regs()
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A D | fsl_ddr_gen4.c | 214 if (regs->ddr_wrlvl_cntl_2) in fsl_ddr_set_memctl_regs() 215 ddr_out32(&ddr->ddr_wrlvl_cntl_2, regs->ddr_wrlvl_cntl_2); in fsl_ddr_set_memctl_regs()
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A D | ctrl_regs.c | 2295 ddr->ddr_wrlvl_cntl_2 = popts->wrlvl_ctl_2; in set_ddr_wrlvl_cntl() 2296 debug("FSLDDR: wrlvl_cntl_2 = 0x%08x\n", ddr->ddr_wrlvl_cntl_2); in set_ddr_wrlvl_cntl()
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A D | interactive.c | 672 CFG_REGS(ddr_wrlvl_cntl_2), in print_fsl_memctl_config_regs() 763 CFG_REGS(ddr_wrlvl_cntl_2), in fsl_ddr_regs_edit()
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/u-boot/board/kontron/sl28/ |
A D | ddr.c | 52 .ddr_wrlvl_cntl_2 = 0x04080700,
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/u-boot/board/freescale/ls1043ardb/ |
A D | ddr.h | 95 .ddr_wrlvl_cntl_2 = 0x07090800,
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/u-boot/board/freescale/ls1021aiot/ |
A D | ls1021aiot.c | 78 out_be32(&ddr->ddr_wrlvl_cntl_2, DDR_DDR_WRLVL_CNTL_2); in ddrmc_init()
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/u-boot/board/freescale/ls1021atsn/ |
A D | ls1021atsn.c | 70 out_be32(&ddr->ddr_wrlvl_cntl_2, DDR_DDR_WRLVL_CNTL_2); in ddrmc_init()
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/u-boot/include/ |
A D | fsl_immap.h | 61 u32 ddr_wrlvl_cntl_2; /* write leveling control 2 */ member
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A D | fsl_ddr_sdram.h | 285 unsigned int ddr_wrlvl_cntl_2; member
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/u-boot/board/freescale/ls1021atwr/ |
A D | ls1021atwr.c | 186 out_be32(&ddr->ddr_wrlvl_cntl_2, DDR_DDR_WRLVL_CNTL_2); in ddrmc_init()
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