Searched refs:ddr_wrlvl_cntl_3 (Results 1 – 12 of 12) sorted by relevance
/u-boot/drivers/ddr/fsl/ |
A D | arm_ddr_gen3.c | 121 if (regs->ddr_wrlvl_cntl_3) in fsl_ddr_set_memctl_regs() 122 ddr_out32(&ddr->ddr_wrlvl_cntl_3, regs->ddr_wrlvl_cntl_3); in fsl_ddr_set_memctl_regs()
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A D | mpc85xx_ddr_gen3.c | 153 if (regs->ddr_wrlvl_cntl_3) in fsl_ddr_set_memctl_regs() 154 out_be32(&ddr->ddr_wrlvl_cntl_3, regs->ddr_wrlvl_cntl_3); in fsl_ddr_set_memctl_regs()
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A D | fsl_ddr_gen4.c | 216 if (regs->ddr_wrlvl_cntl_3) in fsl_ddr_set_memctl_regs() 217 ddr_out32(&ddr->ddr_wrlvl_cntl_3, regs->ddr_wrlvl_cntl_3); in fsl_ddr_set_memctl_regs()
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A D | ctrl_regs.c | 2297 ddr->ddr_wrlvl_cntl_3 = popts->wrlvl_ctl_3; in set_ddr_wrlvl_cntl() 2298 debug("FSLDDR: wrlvl_cntl_3 = 0x%08x\n", ddr->ddr_wrlvl_cntl_3); in set_ddr_wrlvl_cntl()
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A D | interactive.c | 673 CFG_REGS(ddr_wrlvl_cntl_3), in print_fsl_memctl_config_regs() 764 CFG_REGS(ddr_wrlvl_cntl_3), in fsl_ddr_regs_edit()
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/u-boot/board/kontron/sl28/ |
A D | ddr.c | 53 .ddr_wrlvl_cntl_3 = 0x00000009,
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/u-boot/board/freescale/ls1043ardb/ |
A D | ddr.h | 96 .ddr_wrlvl_cntl_3 = 0,
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/u-boot/board/freescale/ls1021aiot/ |
A D | ls1021aiot.c | 79 out_be32(&ddr->ddr_wrlvl_cntl_3, DDR_DDR_WRLVL_CNTL_3); in ddrmc_init()
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/u-boot/board/freescale/ls1021atsn/ |
A D | ls1021atsn.c | 71 out_be32(&ddr->ddr_wrlvl_cntl_3, DDR_DDR_WRLVL_CNTL_3); in ddrmc_init()
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/u-boot/include/ |
A D | fsl_immap.h | 62 u32 ddr_wrlvl_cntl_3; /* write leveling control 3 */ member
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A D | fsl_ddr_sdram.h | 286 unsigned int ddr_wrlvl_cntl_3; member
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/u-boot/board/freescale/ls1021atwr/ |
A D | ls1021atwr.c | 187 out_be32(&ddr->ddr_wrlvl_cntl_3, DDR_DDR_WRLVL_CNTL_3); in ddrmc_init()
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