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Searched refs:ddrphy_trained_csr_num (Results 1 – 19 of 19) sorted by relevance

/u-boot/drivers/ddr/imx/imx8m/
A Dddrphy_csr.c732 uint32_t ddrphy_trained_csr_num = ARRAY_SIZE(ddrphy_trained_csr);
A Dhelper.c141 saved_timing->ddrphy_trained_csr_num = ddrphy_trained_csr_num; in dram_config_save()
169 for (i = 0; i < ddrphy_trained_csr_num; i++) { in dram_config_save()
A Dddrphy_train.c96 ddrphy_trained_csr_save(ddrphy_trained_csr, ddrphy_trained_csr_num); in ddr_cfg_phy()
/u-boot/board/gateworks/venice/
A Dlpddr4_timing.c1985 .ddrphy_trained_csr_num = ARRAY_SIZE(lpddr4_ddrphy_trained_csr),
2501 .ddrphy_trained_csr_num = ARRAY_SIZE(lpddr4_ddrphy_trained_csr),
/u-boot/board/google/imx8mq_phanbell/
A Dlpddr4_timing_1g.c1727 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
/u-boot/board/technexion/pico-imx8mq/
A Dlpddr4_timing_1gb.c1729 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
A Dlpddr4_timing_2gb.c1729 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
A Dlpddr4_timing_3gb.c1729 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
A Dlpddr4_timing_4gb.c1729 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
/u-boot/board/beacon/imx8mn/
A Dlpddr4_2g_timing.c1436 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
A Dlpddr4_timing.c1429 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
/u-boot/board/phytec/phycore_imx8mm/
A Dlpddr4_timing.c1842 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
/u-boot/board/phytec/phycore_imx8mp/
A Dlpddr4_timing.c1845 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
/u-boot/board/freescale/imx8mn_evk/
A Dddr4_timing.c1209 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
/u-boot/board/freescale/imx8mp_evk/
A Dlpddr4_timing.c1844 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
/u-boot/board/toradex/verdin-imx8mm/
A Dlpddr4_timing.c1846 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
/u-boot/board/beacon/imx8mm/
A Dlpddr4_timing.c1977 .ddrphy_trained_csr_num = ARRAY_SIZE(lpddr4_ddrphy_trained_csr),
/u-boot/board/freescale/imx8mm_evk/
A Dlpddr4_timing.c1977 .ddrphy_trained_csr_num = ARRAY_SIZE(lpddr4_ddrphy_trained_csr),
/u-boot/arch/arm/include/asm/arch-imx8m/
A Dddr.h697 unsigned int ddrphy_trained_csr_num; member
748 extern uint32_t ddrphy_trained_csr_num;

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