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Searched refs:ddrpll (Results 1 – 6 of 6) sorted by relevance

/u-boot/arch/arm/cpu/arm926ejs/spear/
A Dspl.c30 u32 clkenb, ddrpll; in ddr_clock_init() local
40 ddrpll = readl(&misc_p->pll_ctr_reg); in ddr_clock_init()
41 ddrpll &= ~MEM_CLK_SEL_MSK; in ddr_clock_init()
43 ddrpll |= MEM_CLK_HCLK; in ddr_clock_init()
45 ddrpll |= MEM_CLK_2HCLK; in ddr_clock_init()
47 ddrpll |= MEM_CLK_PLL2; in ddr_clock_init()
51 writel(ddrpll, &misc_p->pll_ctr_reg); in ddr_clock_init()
/u-boot/arch/mips/mach-ath79/ar934x/
A Dclk.c267 u32 ctrl, cpu, cpupll, ddr, ddrpll; in ar934x_update_clock() local
279 ddrpll = ar934x_ddrpll_to_hz(ddr); in ar934x_update_clock()
286 cpuclk = ddrpll; in ar934x_update_clock()
291 ddrclk = ddrpll; in ar934x_update_clock()
298 busclk = ddrpll; in ar934x_update_clock()
/u-boot/arch/arm/dts/
A Dzynq-cse-nand.dts67 clock-output-names = "armpll", "ddrpll",
A Dzynq-cse-nor.dts52 clock-output-names = "armpll", "ddrpll",
A Dzynq-cse-qspi.dtsi105 clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
A Dzynq-7000.dtsi330 clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",

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