Searched refs:de_clk_cfg (Results 1 – 4 of 4) sorted by relevance
53 clrsetbits_le32(&ccm->de_clk_cfg, CCM_DE2_CTRL_PLL_MASK, in sunxi_de2_composer_init()61 setbits_le32(&ccm->de_clk_cfg, CCM_DE2_CTRL_GATE); in sunxi_de2_composer_init()
67 u32 de_clk_cfg; /* 0x490 display engine clock configuration */ member
95 u32 de_clk_cfg; /* 0x600 DE clock control */ member
75 u32 de_clk_cfg; /* 0x104 DE module clock */ member
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