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Searched refs:dev_dbg (Results 1 – 25 of 130) sorted by relevance

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/u-boot/drivers/remoteproc/
A Dti_k3_arm64_rproc.c60 dev_dbg(dev, "%s addr = 0x%lx, size = 0x%lx\n", __func__, addr, size); in k3_arm64_load()
82 dev_dbg(dev, "%s\n", __func__); in k3_arm64_start()
91 dev_dbg(dev, "GTC RATE= %d\n", (u32) gtc_rate); in k3_arm64_start()
120 dev_dbg(dev, "%s\n", __func__); in k3_arm64_init()
123 dev_dbg(dev, "%s: rproc successfully initialized\n", __func__); in k3_arm64_init()
136 dev_dbg(dev, "%s\n", __func__); in ti_sci_proc_of_to_priv()
167 dev_dbg(dev, "%s\n", __func__); in k3_arm64_of_to_priv()
217 dev_dbg(dev, "%s\n", __func__); in k3_arm64_probe()
223 dev_dbg(dev, "%s: Probe failed with error %d\n", __func__, ret); in k3_arm64_probe()
227 dev_dbg(dev, "Remoteproc successfully probed\n"); in k3_arm64_probe()
A Dti_k3_dsp_rproc.c157 dev_dbg(dev, "%s: Boot vector = 0x%x\n", __func__, boot_vector); in k3_dsp_load()
180 dev_dbg(dev, "%s\n", __func__); in k3_dsp_start()
208 dev_dbg(dev, "%s\n", __func__); in k3_dsp_stop()
226 dev_dbg(dev, "%s\n", __func__); in k3_dsp_init()
233 dev_dbg(dev, "%s\n", __func__); in k3_dsp_reset()
247 dev_dbg(dev, "%s\n", __func__); in k3_dsp_da_to_va()
288 dev_dbg(dev, "%s\n", __func__); in ti_sci_proc_of_to_priv()
321 dev_dbg(dev, "%s\n", __func__); in k3_dsp_of_get_memories()
371 dev_dbg(dev, "%s\n", __func__); in k3_dsp_of_to_priv()
403 dev_dbg(dev, "%s\n", __func__); in k3_dsp_probe()
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A Dti_k3_r5f_rproc.c204 dev_dbg(core->dev, "%s\n", __func__); in k3_r5f_split_release()
230 dev_dbg(dev, "%s\n", __func__); in k3_r5f_prepare()
390 dev_dbg(dev, "%s\n", __func__); in k3_r5f_start()
439 dev_dbg(core->dev, "%s\n", __func__); in k3_r5f_split_reset()
474 dev_dbg(dev, "%s\n", __func__); in k3_r5f_unprepare()
496 dev_dbg(dev, "%s\n", __func__); in k3_r5f_stop()
532 dev_dbg(dev, "%s\n", __func__); in k3_r5f_da_to_va()
648 dev_dbg(dev, "%s\n", __func__); in ti_sci_proc_of_to_priv()
706 dev_dbg(dev, "%s\n", __func__); in k3_r5f_core_of_get_memories()
787 dev_dbg(dev, "%s\n", __func__); in k3_r5f_probe()
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/u-boot/drivers/usb/dwc3/
A Ddwc3-omap.c221 dev_dbg(omap->dev, "ID GND\n"); in dwc3_omap_set_mailbox()
233 dev_dbg(omap->dev, "VBUS Connect\n"); in dwc3_omap_set_mailbox()
246 dev_dbg(omap->dev, "VBUS Disconnect\n"); in dwc3_omap_set_mailbox()
258 dev_dbg(omap->dev, "invalid state\n"); in dwc3_omap_set_mailbox()
275 dev_dbg(omap->dev, "OTG Event\n"); in dwc3_omap_interrupt()
278 dev_dbg(omap->dev, "DRVVBUS Rise\n"); in dwc3_omap_interrupt()
281 dev_dbg(omap->dev, "CHRGVBUS Rise\n"); in dwc3_omap_interrupt()
287 dev_dbg(omap->dev, "IDPULLUP Rise\n"); in dwc3_omap_interrupt()
290 dev_dbg(omap->dev, "DRVVBUS Fall\n"); in dwc3_omap_interrupt()
293 dev_dbg(omap->dev, "CHRGVBUS Fall\n"); in dwc3_omap_interrupt()
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/u-boot/drivers/pinctrl/
A Dpinctrl-single.c58 dev_dbg(dev, " invalid register offset 0x%pa\n", &reg); in single_configure_pins()
75 dev_dbg(dev, " reg/val 0x%pa/0x%08x\n", &reg, val); in single_configure_pins()
92 dev_dbg(dev, " invalid register offset 0x%pa\n", &reg); in single_configure_bits()
112 dev_dbg(dev, " reg/val 0x%pa/0x%08x\n", &reg, val); in single_configure_bits()
126 dev_dbg(dev, "configuring pins for %s\n", config->name); in single_set_state()
128 dev_dbg(dev, " invalid pin configuration in fdt\n"); in single_set_state()
138 dev_dbg(dev, "configuring pins for %s\n", config->name); in single_set_state()
140 dev_dbg(dev, " invalid bits configuration in fdt\n"); in single_set_state()
168 dev_dbg(dev, "no valid base register address\n"); in single_of_to_plat()
A Dpinctrl-generic.c25 dev_dbg(dev, "get_pins_count or get_pin_name missing\n"); in pinctrl_pin_name_to_selector()
56 dev_dbg(dev, "get_groups_count or get_group_name missing\n"); in pinctrl_group_name_to_selector()
88 dev_dbg(dev, in pinmux_func_name_to_selector()
122 dev_dbg(dev, "pinmux_group_set op missing\n"); in pinmux_enable_setting()
129 dev_dbg(dev, "pinmux_set op missing\n"); in pinmux_enable_setting()
165 dev_dbg(dev, "pinconf_num_params or pinconf_params missing\n"); in pinconf_prop_name_to_param()
201 dev_dbg(dev, "pinconf_group_set op missing\n"); in pinconf_enable_setting()
209 dev_dbg(dev, "pinconf_set op missing\n"); in pinconf_enable_setting()
/u-boot/arch/arm/mach-stm32mp/
A Dpwr_regulator.c88 dev_dbg(dev, "no child found\n"); in stm32mp_pwr_bind()
151 dev_dbg(dev, "found regulator %s\n", (*p)->name); in stm32mp_pwr_regulator_probe()
162 dev_dbg(dev, "regulator "); in stm32mp_pwr_regulator_probe()
165 dev_dbg(dev, "%s'%s' ", (i > 1) ? ", " : "", s); in stm32mp_pwr_regulator_probe()
166 dev_dbg(dev, "%s not supported\n", (i > 2) ? "are" : "is"); in stm32mp_pwr_regulator_probe()
185 dev_dbg(dev, "Invalid uV=%d for: %s\n", uV, uc_pdata->name); in stm32mp_pwr_regulator_set_value()
201 dev_dbg(dev, "Invalid constraints for: %s\n", uc_pdata->name); in stm32mp_pwr_regulator_get_value()
218 dev_dbg(dev, "%s id %s\n", p->name, (reg & p->enable) ? "on" : "off"); in stm32mp_pwr_regulator_get_enable()
230 dev_dbg(dev, "Turning %s %s\n", enable ? "on" : "off", p->name); in stm32mp_pwr_regulator_set_enable()
260 dev_dbg(dev, "%s: timeout\n", p->name); in stm32mp_pwr_regulator_set_enable()
/u-boot/drivers/mailbox/
A Dstm32-ipcc.c49 dev_dbg(chan->dev, "chan=%p\n", chan); in stm32_ipcc_request()
52 dev_dbg(chan->dev, "failed to request channel: %ld\n", in stm32_ipcc_request()
62 dev_dbg(chan->dev, "chan=%p\n", chan); in stm32_ipcc_free()
71 dev_dbg(chan->dev, "chan=%p, data=%p\n", chan, data); in stm32_ipcc_send()
88 dev_dbg(chan->dev, "chan=%p, data=%p\n", chan, data); in stm32_ipcc_recv()
109 dev_dbg(dev, "\n"); in stm32_ipcc_probe()
120 dev_dbg(dev, "Missing st,proc_id\n"); in stm32_ipcc_probe()
/u-boot/drivers/i2c/
A Di2c-uniphier-f.c85 dev_dbg(priv->dev, "error: device busy too long. reset...\n"); in uniphier_fi2c_check_bus_busy()
126 dev_dbg(priv->dev, "error: time out\n"); in wait_for_irq()
131 dev_dbg(priv->dev, "error: arbitration lost\n"); in wait_for_irq()
137 dev_dbg(priv->dev, "error: no answer\n"); in wait_for_irq()
148 dev_dbg(priv->dev, "stop condition\n"); in issue_stop()
153 dev_dbg(priv->dev, "error: device busy after operation\n"); in issue_stop()
165 dev_dbg(priv->dev, "%s: addr = %x, len = %d\n", __func__, addr, len); in uniphier_fi2c_transmit()
172 dev_dbg(priv->dev, "start condition\n"); in uniphier_fi2c_transmit()
180 dev_dbg(priv->dev, "sending %x\n", *buf); in uniphier_fi2c_transmit()
221 dev_dbg(priv->dev, "start condition\n"); in uniphier_fi2c_receive()
[all …]
/u-boot/drivers/usb/mtu3/
A Dmtu3_gadget.c30 dev_dbg(mtu->dev, "%s complete req: %p, sts %d, %d/%d\n", in mtu3_req_complete()
170 dev_dbg(mtu->dev, "%s %s\n", __func__, ep->name); in mtu3_gadget_ep_enable()
202 dev_dbg(mtu->dev, "%s %s\n", __func__, mep->name); in mtu3_gadget_ep_disable()
316 dev_dbg(mtu->dev, "%s : req=%p\n", __func__, req); in mtu3_gadget_dequeue()
421 dev_dbg(mtu->dev, "%s\n", __func__); in mtu3_gadget_wakeup()
528 dev_dbg(mtu->dev, "%s\n", __func__); in mtu3_gadget_stop()
547 dev_dbg(mtu->dev, "%s %d\n", __func__, speed); in mtu3_gadget_set_speed()
644 dev_dbg(mtu->dev, "gadget RESUME\n"); in mtu3_gadget_resume()
655 dev_dbg(mtu->dev, "gadget SUSPEND\n"); in mtu3_gadget_suspend()
666 dev_dbg(mtu->dev, "gadget DISCONNECT\n"); in mtu3_gadget_disconnect()
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A Dmtu3_gadget_ep0.c74 dev_dbg(mtu->dev, "%s ret %d\n", __func__, ret); in forward_to_driver()
304 dev_dbg(mtu->dev, "TEST_J\n"); in handle_test_mode()
308 dev_dbg(mtu->dev, "TEST_K\n"); in handle_test_mode()
312 dev_dbg(mtu->dev, "TEST_SE0_NAK\n"); in handle_test_mode()
316 dev_dbg(mtu->dev, "TEST_PACKET\n"); in handle_test_mode()
540 dev_dbg(mtu->dev, "%s\n", __func__); in ep0_rx_state()
564 dev_dbg(mtu->dev, "ep0 state: %s\n", in ep0_rx_state()
573 dev_dbg(mtu->dev, "%s: SENDSTALL\n", __func__); in ep0_rx_state()
593 dev_dbg(mtu->dev, "%s\n", __func__); in ep0_tx_state()
620 dev_dbg(mtu->dev, "%s ep0csr=0x%x\n", __func__, in ep0_tx_state()
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A Dmtu3_core.c33 dev_dbg(mep->mtu->dev, "%s fifo:%#x/%#x, bit: %d\n", in ep_fifo_alloc()
53 dev_dbg(mep->mtu->dev, "%s size:%#x/%#x, bit: %d\n", in ep_fifo_free()
66 dev_dbg(mtu->dev, "USB3_EN = %d\n", !!enable); in mtu3_ss_func_set()
79 dev_dbg(mtu->dev, "SOFTCONN = %d\n", !!enable); in mtu3_hs_softconn_set()
260 dev_dbg(mtu->dev, "%s: %s\n", mep->name, in mtu3_ep_stall_set()
279 dev_dbg(mtu->dev, "%s devctl 0x%x\n", __func__, in mtu3_start()
292 dev_dbg(mtu->dev, "%s\n", __func__); in mtu3_stop()
425 dev_dbg(mtu->dev, "%s: %s\n", __func__, mep->name); in mtu3_deconfig_ep()
595 dev_dbg(mtu->dev, "=== LINK[%x] ===\n", link); in mtu3_link_isr()
653 dev_dbg(mtu->dev, "=== LTSSM[%x] ===\n", ltssm); in mtu3_u3_ltssm_isr()
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/u-boot/drivers/watchdog/
A Dxilinx_wwdt.c69 dev_dbg(dev, "Watchdog disabled!\n"); in xlnx_wwdt_stop()
88 dev_dbg(dev, "%s: CLK %ld\n", __func__, clock_f); in xlnx_wwdt_start()
130 dev_dbg(dev, "%s: Probing wdt%u\n", __func__, dev_seq(dev)); in xlnx_wwdt_probe()
134 dev_dbg(dev, "failed to get regbase of wwdt\n"); in xlnx_wwdt_probe()
153 dev_dbg(dev, "wdt-enable-once %d\n", plat->enable_once); in xlnx_wwdt_of_to_plat()
/u-boot/drivers/usb/cdns3/
A Ddrd.c44 dev_dbg(cdns->dev, "Set controller to OTG mode\n"); in cdns3_set_mode()
75 dev_dbg(cdns->dev, "OTG ID: %d", id); in cdns3_get_id()
85 dev_dbg(cdns->dev, "OTG VBUS: %d", vbus); in cdns3_get_vbus()
127 dev_dbg(cdns->dev, "Waiting till Host mode is turned on\n"); in cdns3_drd_switch_host()
164 dev_dbg(cdns->dev, "Waiting till Device mode is turned on\n"); in cdns3_drd_switch_gadget()
283 dev_dbg(cdns->dev, "Controller strapped to HOST\n"); in cdns3_drd_init()
286 dev_dbg(cdns->dev, "Controller strapped to PERIPHERAL\n"); in cdns3_drd_init()
/u-boot/drivers/core/
A Dsyscon-uclass.c88 dev_dbg(dev, "unable to bound syscon device\n"); in syscon_probe_by_ofnode()
93 dev_dbg(dev, "unable to probe syscon device\n"); in syscon_probe_by_ofnode()
120 dev_dbg(dev, "unable to find syscon device\n"); in syscon_regmap_lookup_by_phandle()
130 dev_dbg(dev, "unable to find regmap\n"); in syscon_regmap_lookup_by_phandle()
211 dev_dbg(dev, "unable to find regmap\n"); in syscon_node_to_regmap()
/u-boot/drivers/usb/musb-new/
A Dmusb_gadget.c248 dev_dbg(musb->controller, "%s: abort DMA --> %d\n", in nuke()
339 dev_dbg(musb->controller, "dma pending...\n"); in txstate()
575 dev_dbg(musb->controller, "sending zero pkt\n"); in musb_g_tx()
594 dev_dbg(musb->controller, "%s idle now\n", in musb_g_tx()
668 dev_dbg(musb->controller, "DMA pending...\n"); in rxstate()
963 dev_dbg(musb->controller, "%s busy, csr %04x\n", in musb_g_rx()
1276 dev_dbg(musb->controller, "not enough memory\n"); in musb_alloc_request()
1676 dev_dbg(musb->controller, "Unhandled wake: %s\n", in musb_gadget_wakeup()
1686 dev_dbg(musb->controller, "issue wakeup\n"); in musb_gadget_wakeup()
1823 dev_dbg(dev, "%s\n", __func__); in musb_gadget_release()
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A Dmusb_host.c277 dev_dbg(musb->controller, "SOF for %d\n", epnum); in musb_start_urb()
287 dev_dbg(musb->controller, "Start TX%d %s\n", epnum, in musb_start_urb()
302 dev_dbg(musb->controller, in musb_giveback()
425 dev_dbg(musb->controller, "... next ep%d %cX urb %p\n", in musb_advance_schedule()
925 dev_dbg(musb->controller, "start no-DATA\n"); in musb_h_ep0_continue()
928 dev_dbg(musb->controller, "start IN-DATA\n"); in musb_h_ep0_continue()
933 dev_dbg(musb->controller, "start OUT-DATA\n"); in musb_h_ep0_continue()
1001 dev_dbg(musb->controller, "STALLING ENDPOINT\n"); in musb_h_ep0_irq()
1009 dev_dbg(musb->controller, "control NAK timeout\n"); in musb_h_ep0_irq()
1024 dev_dbg(musb->controller, "aborting\n"); in musb_h_ep0_irq()
[all …]
/u-boot/drivers/clk/ti/
A Dclk-ctrl.c52 dev_dbg(clk->dev, "disable module @ %p\n", clk_modules[0]); in clk_ti_ctrl_disable()
72 dev_dbg(clk->dev, "enable module @ %p\n", clk_modules[0]); in clk_ti_ctrl_enable()
95 dev_dbg(clk->dev, "name=%s, id=%ld\n", clk->dev->name, clk->id); in clk_ti_ctrl_of_xlate()
112 dev_dbg(dev, "size=%d, regs_num=%d\n", size, priv->offs_num); in clk_ti_ctrl_of_to_plat()
128 dev_dbg(dev, "start=0x%08lx, end=0x%08lx\n", in clk_ti_ctrl_of_to_plat()
A Dclk-am3-dpll.c73 dev_dbg(clk->dev, "rate=%ld, best_rate=%ld, mult=%d, div=%d\n", rate, in clk_ti_am3_dpll_round_rate()
140 dev_dbg(clk->dev, "rate=%lld\n", rate); in clk_ti_am3_dpll_get_rate()
152 dev_dbg(clk->dev, "rate=%lld\n", rate); in clk_ti_am3_dpll_get_rate()
216 dev_dbg(dev, "clkmode_reg=0x%08lx\n", priv->clkmode_reg); in clk_ti_am3_dpll_of_to_plat()
224 dev_dbg(dev, "idlest_reg=0x%08lx\n", priv->idlest_reg); in clk_ti_am3_dpll_of_to_plat()
232 dev_dbg(dev, "clksel_reg=0x%08lx\n", priv->clksel_reg); in clk_ti_am3_dpll_of_to_plat()
/u-boot/drivers/mmc/
A Dbcm2835_sdhost.c188 dev_dbg(host->dev, "=========== REGISTER DUMP ===========\n"); in bcm2835_dumpregs()
189 dev_dbg(host->dev, "SDCMD 0x%08x\n", readl(host->ioaddr + SDCMD)); in bcm2835_dumpregs()
190 dev_dbg(host->dev, "SDARG 0x%08x\n", readl(host->ioaddr + SDARG)); in bcm2835_dumpregs()
191 dev_dbg(host->dev, "SDTOUT 0x%08x\n", readl(host->ioaddr + SDTOUT)); in bcm2835_dumpregs()
192 dev_dbg(host->dev, "SDCDIV 0x%08x\n", readl(host->ioaddr + SDCDIV)); in bcm2835_dumpregs()
193 dev_dbg(host->dev, "SDRSP0 0x%08x\n", readl(host->ioaddr + SDRSP0)); in bcm2835_dumpregs()
194 dev_dbg(host->dev, "SDRSP1 0x%08x\n", readl(host->ioaddr + SDRSP1)); in bcm2835_dumpregs()
198 dev_dbg(host->dev, "SDVDD 0x%08x\n", readl(host->ioaddr + SDVDD)); in bcm2835_dumpregs()
199 dev_dbg(host->dev, "SDEDM 0x%08x\n", readl(host->ioaddr + SDEDM)); in bcm2835_dumpregs()
741 dev_dbg(host->dev, "f_max %d, f_min %d\n", in bcm2835_add_host()
[all …]
A Dstm32_sdmmc2.c320 dev_dbg(dev, "timeout reading SDMMC_STA register\n"); in stm32_sdmmc2_end_cmd()
327 dev_dbg(dev, "error SDMMC_STA_CTIMEOUT (0x%x) for cmd %d\n", in stm32_sdmmc2_end_cmd()
334 dev_dbg(dev, "error SDMMC_STA_CCRCFAIL (0x%x) for cmd %d\n", in stm32_sdmmc2_end_cmd()
359 dev_dbg(dev, "timeout reading SDMMC_STA\n"); in stm32_sdmmc2_end_cmd()
365 dev_dbg(dev, in stm32_sdmmc2_end_cmd()
404 dev_dbg(dev, "error SDMMC_STA_DCRCFAIL (0x%x) for cmd %d\n", in stm32_sdmmc2_end_data()
426 dev_dbg(dev, "error SDMMC_STA_RXOVERR (0x%x) for cmd %d\n", in stm32_sdmmc2_end_data()
433 dev_dbg(dev, "error SDMMC_STA_IDMATE (0x%x) for cmd %d\n", in stm32_sdmmc2_end_data()
463 dev_dbg(dev, "send cmd %d data: 0x%x @ 0x%x\n", in stm32_sdmmc2_send_cmd()
586 dev_dbg(dev, "bus_with = %d, clock = %d\n", in stm32_sdmmc2_set_ios()
[all …]
/u-boot/drivers/w1-eeprom/
A Dds2502.c87 dev_dbg(dev, "Error %d reading command CRC\n", ret); in ds2502_read()
92 dev_dbg(dev, in ds2502_read()
102 dev_dbg(dev, "Error %d reading data\n", ret); in ds2502_read()
112 dev_dbg(dev, "Bad CRC8 got=%02X exp=%02X pos=%04X\n", in ds2502_read()
196 dev_dbg(dev, "page logical %d => physical %d\n", i, page); in ds2502_read_buf()
/u-boot/drivers/pinctrl/nxp/
A Dpinctrl-imx.c35 dev_dbg(dev, "%s: %s\n", __func__, config->name); in imx_pinctrl_set_state()
102 dev_dbg(dev, "mux_reg 0x%x, conf_reg 0x%x, " in imx_pinctrl_set_state()
122 dev_dbg(dev, "write mux: offset 0x%x val 0x%x\n", in imx_pinctrl_set_state()
172 dev_dbg(dev, "select_input: offset 0x%x val " in imx_pinctrl_set_state()
187 dev_dbg(dev, "write config: offset 0x%x val " in imx_pinctrl_set_state()
255 dev_dbg(dev, "initialized IMX pinctrl driver\n"); in imx_pinctrl_probe()
/u-boot/drivers/pci/
A Dpci-aardvark.c317 dev_dbg(pcie->dev, "PCIE CFG read: (b,d,f)=(%2d,%2d,%2d) ", in pcie_advk_read_config()
321 dev_dbg(pcie->dev, "- out of range\n"); in pcie_advk_read_config()
355 dev_dbg(pcie->dev, "(addr,size,val)=(0x%04x, %d, 0x%08x)\n", in pcie_advk_read_config()
413 dev_dbg(pcie->dev, "PCIE CFG write: (b,d,f)=(%2d,%2d,%2d) ", in pcie_advk_write_config()
415 dev_dbg(pcie->dev, "(addr,size,val)=(0x%04x, %d, 0x%08lx)\n", in pcie_advk_write_config()
419 dev_dbg(pcie->dev, "- out of range\n"); in pcie_advk_write_config()
440 dev_dbg(pcie->dev, "\tPIO req. - addr = 0x%08x\n", reg); in pcie_advk_write_config()
445 dev_dbg(pcie->dev, "\tPIO req. - val = 0x%08x\n", reg); in pcie_advk_write_config()
450 dev_dbg(pcie->dev, "\tPIO req. - strb = 0x%02x\n", reg); in pcie_advk_write_config()
650 dev_dbg(dev, "Toggle PCIE Reset GPIO ...\n"); in pcie_advk_probe()
/u-boot/drivers/mtd/spi/
A Dspi-nor-tiny.c64 dev_dbg(nor->spi->dev, "error %d reading %x\n", ret, in spi_nor_read_reg()
136 dev_dbg(nor->dev, "error %d reading CR\n", ret); in read_cr()
377 dev_dbg(nor->dev, "error %d reading JEDEC ID\n", tmp); in spi_nor_read_id()
399 dev_dbg(nor->dev, "from 0x%08x, len %zd\n", (u32)from, len); in spi_nor_read()
489 dev_dbg(nor->dev, in write_sr_cr()
496 dev_dbg(nor->dev, in write_sr_cr()
525 dev_dbg(nor->dev, in spansion_read_cr_quad_enable()
550 dev_dbg(nor->dev, "Spansion Quad bit not set\n"); in spansion_read_cr_quad_enable()
672 dev_dbg(nor->dev, in spi_nor_setup()
698 dev_dbg(nor->dev, "quad mode not supported\n"); in spi_nor_setup()
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