/u-boot/board/cloudengines/pogo_e02/ |
A D | pogo_e02.c | 80 u16 devadr; in reset_phy() local 87 if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { in reset_phy() 96 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in reset_phy() 97 miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); in reset_phy() 99 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); in reset_phy() 100 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); in reset_phy() 103 miiphy_reset(name, devadr); in reset_phy()
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/u-boot/board/Seagate/nas220/ |
A D | nas220.c | 94 u16 devadr; in reset_phy() local 101 if (miiphy_read(name, 0xEE, 0xEE, (u16 *)&devadr)) { in reset_phy() 110 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in reset_phy() 111 miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); in reset_phy() 113 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); in reset_phy() 114 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); in reset_phy() 117 miiphy_reset(name, devadr); in reset_phy()
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/u-boot/board/Marvell/dreamplug/ |
A D | dreamplug.c | 104 u16 devadr; in mv_phy_88e1116_init() local 110 if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { in mv_phy_88e1116_init() 120 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in mv_phy_88e1116_init() 121 miiphy_read(name, devadr, MV88E1116_MAC_CTRL2_REG, ®); in mv_phy_88e1116_init() 123 miiphy_write(name, devadr, MV88E1116_MAC_CTRL2_REG, reg); in mv_phy_88e1116_init() 124 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); in mv_phy_88e1116_init() 127 miiphy_reset(name, devadr); in mv_phy_88e1116_init()
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/u-boot/board/Marvell/guruplug/ |
A D | guruplug.c | 107 u16 devadr; in mv_phy_88e1121_init() local 113 if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { in mv_phy_88e1121_init() 123 miiphy_write(name, devadr, MV88E1121_PGADR_REG, 2); in mv_phy_88e1121_init() 124 miiphy_read(name, devadr, MV88E1121_MAC_CTRL2_REG, ®); in mv_phy_88e1121_init() 126 miiphy_write(name, devadr, MV88E1121_MAC_CTRL2_REG, reg); in mv_phy_88e1121_init() 127 miiphy_write(name, devadr, MV88E1121_PGADR_REG, 0); in mv_phy_88e1121_init() 130 miiphy_reset(name, devadr); in mv_phy_88e1121_init()
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/u-boot/board/Marvell/sheevaplug/ |
A D | sheevaplug.c | 108 u16 devadr; in reset_phy() local 115 if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { in reset_phy() 125 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in reset_phy() 126 miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); in reset_phy() 128 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); in reset_phy() 129 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); in reset_phy() 132 miiphy_reset(name, devadr); in reset_phy()
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/u-boot/board/d-link/dns325/ |
A D | dns325.c | 108 u16 devadr; in reset_phy() local 115 if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { in reset_phy() 124 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in reset_phy() 125 miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); in reset_phy() 127 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); in reset_phy() 128 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); in reset_phy() 131 miiphy_reset(name, devadr); in reset_phy()
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/u-boot/board/Marvell/openrd/ |
A D | openrd.c | 119 u16 devadr; in mv_phy_init() local 125 if (miiphy_read(name, 0xEE, 0xEE, (u16 *)&devadr)) { in mv_phy_init() 134 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in mv_phy_init() 135 miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); in mv_phy_init() 137 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); in mv_phy_init() 138 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); in mv_phy_init() 141 miiphy_reset(name, devadr); in mv_phy_init()
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/u-boot/board/Seagate/dockstar/ |
A D | dockstar.c | 113 u16 devadr; in reset_phy() local 120 if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { in reset_phy() 130 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in reset_phy() 131 miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); in reset_phy() 133 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); in reset_phy() 134 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); in reset_phy() 137 miiphy_reset(name, devadr); in reset_phy()
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/u-boot/board/Seagate/goflexhome/ |
A D | goflexhome.c | 115 u16 devadr; in reset_phy() local 122 if (miiphy_read(name, 0xEE, 0xEE, (u16 *)&devadr)) { in reset_phy() 132 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in reset_phy() 133 miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); in reset_phy() 135 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); in reset_phy() 136 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); in reset_phy() 139 miiphy_reset(name, devadr); in reset_phy()
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/u-boot/board/Synology/ds109/ |
A D | ds109.c | 154 u16 devadr; in reset_phy() local 161 if (miiphy_read(name, 0xEE, 0xEE, (u16 *)&devadr)) { in reset_phy() 170 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in reset_phy() 171 miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); in reset_phy() 173 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); in reset_phy() 174 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); in reset_phy() 177 miiphy_reset(name, devadr); in reset_phy()
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/u-boot/drivers/net/pfe_eth/ |
A D | pfe_mdio.c | 23 u32 devadr; in pfe_write_addr() local 28 devadr = ((dev_addr & EMAC_MII_DATA_RA_MASK) << EMAC_MII_DATA_RA_SHIFT); in pfe_write_addr() 31 reg_data = (EMAC_MII_DATA_TA | phy | devadr | reg_addr); in pfe_write_addr()
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