/u-boot/arch/powerpc/cpu/mpc85xx/ |
A D | mp.c | 125 u32 devdisr = in_be32(&gur->devdisr); in is_core_disabled() local 342 u32 devdisr; in plat_mp_up() local 349 devdisr = in_be32(&gur->devdisr); in plat_mp_up() 351 devdisr |= MPC85xx_DEVDISR_TB0; in plat_mp_up() 353 devdisr |= MPC85xx_DEVDISR_TB1; in plat_mp_up() 354 out_be32(&gur->devdisr, devdisr); in plat_mp_up() 385 devdisr |= MPC85xx_DEVDISR_TB1; in plat_mp_up() 387 devdisr |= MPC85xx_DEVDISR_TB0; in plat_mp_up() 388 out_be32(&gur->devdisr, devdisr); in plat_mp_up() 391 in_be32(&gur->devdisr); in plat_mp_up() [all …]
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A D | fsl_corenet_serdes.c | 347 u32 devdisr, u32 devdisr2, int cfg) in p4080_erratum_serdes8() argument 360 clrbits_be32(&gur->devdisr, devdisr); in p4080_erratum_serdes8()
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A D | cpu.c | 443 setbits_be32(&gur->devdisr, 0x00010000); in dram_init() 446 clrbits_be32(&gur->devdisr, 0x00010000); in dram_init()
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/u-boot/drivers/net/fm/ |
A D | p1023.c | 20 u32 devdisr = in_be32(&gur->devdisr); in is_device_disabled() local 22 return port_to_devdisr[port] & devdisr; in is_device_disabled() 33 setbits_be32(&gur->devdisr, port_to_devdisr[port]); in fman_disable_port() 40 clrbits_be32(&gur->devdisr, port_to_devdisr[port]); in fman_enable_port()
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/u-boot/arch/powerpc/cpu/mpc86xx/ |
A D | mp.c | 41 setbits_be32(&gur->devdisr, MPC86xx_DEVDISR_CPU0); in cpu_disable() 44 setbits_be32(&gur->devdisr, MPC86xx_DEVDISR_CPU1); in cpu_disable() 57 u32 devdisr = in_be32(&gur->devdisr); in is_core_disabled() local 61 return (devdisr & MPC86xx_DEVDISR_CPU0); in is_core_disabled() 63 return (devdisr & MPC86xx_DEVDISR_CPU1); in is_core_disabled()
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/u-boot/board/xes/common/ |
A D | fsl_8xxx_pci.c | 30 u32 devdisr = in_be32(&gur->devdisr); in pci_init_board() local 37 if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { in pci_init_board() 61 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); in pci_init_board()
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/u-boot/board/freescale/mpc8568mds/ |
A D | mpc8568mds.c | 300 u32 devdisr, pordevsr, io_sel; in pci_init_board() local 303 devdisr = in_be32(&gur->devdisr); in pci_init_board() 308 debug(" %s: devdisr=%x, io_sel=%x\n", __func__, devdisr, io_sel); in pci_init_board() 315 if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { in pci_init_board() 343 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */ in pci_init_board()
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/u-boot/board/freescale/mpc8548cds/ |
A D | mpc8548cds.c | 201 u32 devdisr, pordevsr, io_sel; in pci_init_board() local 206 devdisr = in_be32(&gur->devdisr); in pci_init_board() 211 debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel); in pci_init_board() 219 if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { in pci_init_board() 256 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */ in pci_init_board() 271 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI2); /* disable */ in pci_init_board()
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/u-boot/arch/powerpc/cpu/mpc8xxx/ |
A D | srio.c | 235 u32 *devdisr; in srio_init() local 238 devdisr = &gur->devdisr3; in srio_init() 240 devdisr = &gur->devdisr; in srio_init() 278 setbits_be32(devdisr, _DEVDISR_SRIO1); in srio_init() 280 setbits_be32(devdisr, _DEVDISR_SRIO2); in srio_init() 285 setbits_be32(devdisr, _DEVDISR_SRIO1); in srio_init() 286 setbits_be32(devdisr, _DEVDISR_SRIO2); in srio_init() 287 setbits_be32(devdisr, _DEVDISR_RMU); in srio_init()
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/u-boot/board/sbc8548/ |
A D | sbc8548.c | 252 u32 devdisr = in_be32(&gur->devdisr); in pci_init_board() local 256 if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { in pci_init_board() 283 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */ in pci_init_board() 286 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI2); /* disable PCI2 */ in pci_init_board()
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/u-boot/drivers/misc/ |
A D | fsl_devdis.c | 24 setbits_be32(&gur->devdisr + tbl[i].offset, in device_disable()
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/u-boot/drivers/pci/ |
A D | fsl_pci_init.c | 826 int fsl_pcie_init_ctrl(int busno, u32 devdisr, enum srds_prtcl dev, in fsl_pcie_init_ctrl() argument 836 if (is_serdes_configured(dev) && !(devdisr & devdisr_mask[num])) { in fsl_pcie_init_ctrl() 850 u32 devdisr; in fsl_pcie_init_board() local 856 addr = &gur->devdisr; in fsl_pcie_init_board() 858 devdisr = in_be32(addr); in fsl_pcie_init_board() 862 busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE1, &pci_info); in fsl_pcie_init_board() 869 busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE2, &pci_info); in fsl_pcie_init_board() 876 busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE3, &pci_info); in fsl_pcie_init_board() 883 busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE4, &pci_info); in fsl_pcie_init_board() 891 int fsl_pcie_init_ctrl(int busno, u32 devdisr, enum srds_prtcl dev, in fsl_pcie_init_ctrl() argument
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/u-boot/arch/arm/cpu/armv7/ls102xa/ |
A D | ls102xa_psci.c | 204 setbits_be32(&gur->devdisr, CCSR_DEVDISR1_QE); in ls1_deep_sleep()
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/u-boot/drivers/qe/ |
A D | qe.c | 490 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_QE_DISABLE); in qe_upload_firmware() 630 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_QE_DISABLE); in u_qe_upload_firmware() 738 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_QE_DISABLE); in u_qe_firmware_resume()
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/u-boot/arch/powerpc/include/asm/ |
A D | fsl_pci.h | 190 int fsl_pcie_init_ctrl(int busno, u32 devdisr, enum srds_prtcl dev,
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A D | immap_86xx.h | 1091 uint devdisr; /* 0xe0070 - Device disable control */ member
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A D | immap_85xx.h | 1605 u32 devdisr; /* Device disable control */ member 2442 u32 devdisr; /* Device disable control */ member
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/u-boot/arch/arm/include/asm/arch-ls102xa/ |
A D | immap_ls102xa.h | 100 u32 devdisr; /* Device disable control */ member
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/u-boot/arch/arm/include/asm/arch-fsl-layerscape/ |
A D | immap_lsch3.h | 338 u32 devdisr; /* Device disable control 1 */ member
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A D | immap_lsch2.h | 240 u32 devdisr; /* Device disable control */ member
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