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Searched refs:dfitmg0 (Results 1 – 13 of 13) sorted by relevance

/u-boot/board/technexion/pico-imx7d/
A Dspl.c52 .dfitmg0 = 0x02098204,
/u-boot/arch/arm/mach-sunxi/dram_timings/
A Dh616_ddr3_1333.c89 &mctl_ctl->dfitmg0); in mctl_set_timing_params()
A Dh6_lpddr3.c123 &mctl_ctl->dfitmg0); in mctl_set_timing_params()
A Dh6_ddr3_1333.c135 &mctl_ctl->dfitmg0); in mctl_set_timing_params()
/u-boot/arch/arm/mach-imx/mx7/
A Dddr.c78 writel(ddrc_regs_val->dfitmg0, &ddrc_regs->dfitmg0); in mx7_dram_cfg()
/u-boot/board/compulab/cl-som-imx7/
A Dspl.c53 .dfitmg0 = 0x02098204,
/u-boot/arch/arm/include/asm/arch-mx7/
A Dmx7-ddr.h45 u32 dfitmg0; /* 0x0190 */ member
/u-boot/arch/arm/include/asm/arch-sunxi/
A Ddram_sun50i_h616.h90 u32 dfitmg0; /* 0x190 */ member
A Ddram_sun50i_h6.h105 u32 dfitmg0; /* 0x190 */ member
/u-boot/drivers/ram/stm32mp1/
A Dstm32mp1_ddr.h53 u32 dfitmg0; member
A Dstm32mp1_ddr_regs.h64 u32 dfitmg0; /* 0x190 DFI Timing 0*/ member
A Dstm32mp1_ddr.c87 DDRCTL_REG_REG(dfitmg0),
/u-boot/arch/arm/include/asm/arch-imx8m/
A Dddr.h59 u32 dfitmg0; member
158 u32 dfitmg0; member

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