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/u-boot/arch/arm/mach-sunxi/
A Ddram_sun4i.c374 u32 dgr = readl(rank == 0 ? &dram->rdgr0 : &dram->rdgr1); in mctl_set_dqs_gating_delay() local
379 dgr &= ~(3 << (lane * 2)); in mctl_set_dqs_gating_delay()
380 dgr |= (tmp & 3) << (lane * 2); in mctl_set_dqs_gating_delay()
383 writel(dgr, rank == 0 ? &dram->rdgr0 : &dram->rdgr1); in mctl_set_dqs_gating_delay()

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