Home
last modified time | relevance | path

Searched refs:div4 (Results 1 – 5 of 5) sorted by relevance

/u-boot/arch/arm/mach-s5pc1xx/include/mach/
A Dclock.h32 unsigned int div4; member
68 unsigned int div4; member
/u-boot/arch/arm/mach-keystone/include/mach/
A Dclock_defs.h41 u32 div4; /* 60 */ member
/u-boot/arch/arm/dts/
A Dls1021a.dtsi164 "cga-pll1-div4";
179 clock-names = "pll1cga", "pll1cga-div2", "pll1cga-div4";
A Dda850.dtsi354 div4p5_clk: div4.5 {
364 clock-names = "pll0_sysclk3", "div4.5";
/u-boot/arch/arm/mach-keystone/
A Dclock.c133 offset = pllctl_reg(data->pll, div4) + (i - 3); in configure_main_pll()

Completed in 37 milliseconds