Searched refs:div_shift (Results 1 – 9 of 9) sorted by relevance
| /u-boot/drivers/clk/imx/ |
| A D | clk-pllv3.c | 39 u32 div_shift; member
50 u32 div = (readl(pll->base) >> pll->div_shift) & pll->div_mask; in clk_pllv3_generic_get_rate()
69 val &= ~(pll->div_mask << pll->div_shift); in clk_pllv3_generic_set_rate()
70 val |= (div << pll->div_shift); in clk_pllv3_generic_set_rate()
269 pll->div_shift = 0; in imx_clk_pllv3()
274 pll->div_shift = 0; in imx_clk_pllv3()
279 pll->div_shift = 1; in imx_clk_pllv3()
284 pll->div_shift = 0; in imx_clk_pllv3()
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| /u-boot/drivers/clk/mvebu/ |
| A D | armada-37xx-periph.c | 79 int div_shift[2]; member
117 .div_shift[0] = _s0, \
118 .div_shift[1] = _s1, \
133 .div_shift[0] = _s, \
147 .div_shift[0] = _s, \
167 .div_shift[0] = _s, \
181 .div_shift[0] = _s0, \
182 .div_shift[1] = _s1, \
282 reg = (reg >> clk->div_shift[idx]) & clk->div_mask[idx]; in get_div()
298 reg &= ~(clk->div_mask[idx] << clk->div_shift[idx]); in set_div_val()
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| /u-boot/drivers/clk/rockchip/ |
| A D | clk_rk3368.c | 365 uint8_t div_shift; member
373 [0] = { .reg = 45, .div_shift = 0, .sel_shift = 7, },
374 [1] = { .reg = 45, .div_shift = 8, .sel_shift = 15, },
375 [2] = { .reg = 46, .div_shift = 8, .sel_shift = 15, },
399 div = extract_bits(val, 7, spiclk->div_shift); in rk3368_spi_get_clk()
424 ((0x7f << spiclk->div_shift) | in rk3368_spi_set_clk()
426 ((src_clk_div << spiclk->div_shift) | in rk3368_spi_set_clk()
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| A D | clk_rk3399.c | 605 u8 div_shift; member
617 .div_shift = CLK_SPI0_PLL_DIV_CON_SHIFT,
620 .div_shift = CLK_SPI1_PLL_DIV_CON_SHIFT,
623 .div_shift = CLK_SPI2_PLL_DIV_CON_SHIFT,
626 .div_shift = CLK_SPI4_PLL_DIV_CON_SHIFT,
629 .div_shift = CLK_SPI5_PLL_DIV_CON_SHIFT,
649 div = bitfield_extract(val, spiclk->div_shift, in rk3399_spi_get_clk()
674 ((CLK_SPI_PLL_DIV_CON_MASK << spiclk->div_shift) | in rk3399_spi_set_clk()
676 ((src_clk_div << spiclk->div_shift) | in rk3399_spi_set_clk()
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| /u-boot/drivers/clk/at91/ |
| A D | clk-sam9x60-pll.c | 323 if (div == ((val & pll->layout->div_mask) >> pll->layout->div_shift)) in sam9x60_div_pll_set_rate()
329 div << pll->layout->div_shift); in sam9x60_div_pll_set_rate()
359 div = (val & pll->layout->div_mask) >> pll->layout->div_shift; in sam9x60_div_pll_get_rate()
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| A D | pmc.h | 54 u8 div_shift; member
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| A D | sama7g5.c | 177 .div_shift = 0,
185 .div_shift = 12,
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| A D | sam9x60.c | 134 .div_shift = 0,
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| /u-boot/drivers/clk/ |
| A D | clk_sandbox_ccf.c | 29 u32 div_shift; member
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