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/u-boot/arch/arm/mach-imx/imx8m/
A D	clock_imx8mq.c	86 u32 divr1, divr2, divf1, divf2, divq, div; in decode_sscg_pll() local 232 divf1 = (pll_cfg2 & SSCG_PLL_FEEDBACK_DIV_F1_MASK) >> in decode_sscg_pll() 245 pllout = pll_refclk / (divr1 + 1) * sse * (divf1 + 1) / in decode_sscg_pll()

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