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Searched refs:divisor (Results 1 – 25 of 42) sorted by relevance

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/u-boot/lib/
A Ddiv64.c78 if (divisor > 0) in div_s64_rem()
82 if (divisor < 0) in div_s64_rem()
104 u32 high = divisor >> 32; in div64_u64_rem()
119 if (*remainder >= divisor) { in div64_u64_rem()
121 *remainder -= divisor; in div64_u64_rem()
142 u64 div64_u64(u64 dividend, u64 divisor) in div64_u64() argument
144 u32 high = divisor >> 32; in div64_u64()
148 quot = div_u64(dividend, divisor); in div64_u64()
155 if ((dividend - quot * divisor) >= divisor) in div64_u64()
170 s64 div64_s64(s64 dividend, s64 divisor) in div64_s64() argument
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/u-boot/arch/arm/lib/
A Dlib1funcs.S34 mov \divisor, \divisor, lsl \result
45 moveq \divisor, \divisor, lsl #3
55 movlo \divisor, \divisor, lsl #4
63 movlo \divisor, \divisor, lsl #1
86 movne \divisor, \divisor, lsr #4
102 movhs \divisor, \divisor, lsr #16
107 movhs \divisor, \divisor, lsr #8
111 movhs \divisor, \divisor, lsr #4
142 movlo \divisor, \divisor, lsl #4
150 movlo \divisor, \divisor, lsl #1
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A Ddiv64.S53 bls 9f @ divisor is 0 or 1
55 beq 8f @ divisor is power of 2
62 @ Align divisor with upper part of dividend.
63 @ The aligned divisor is stored in yl preserving the original.
105 @ divisor for comparisons, considering the carry-out bit as well.
142 @ divisor at this point since divisor can not be smaller than 3 here.
150 8: @ Division by a power of 2: determine what that divisor order is
/u-boot/include/linux/
A Dmath64.h21 *remainder = dividend % divisor; in div_u64_rem()
22 return dividend / divisor; in div_u64_rem()
30 *remainder = dividend % divisor; in div_s64_rem()
31 return dividend / divisor; in div_s64_rem()
39 *remainder = dividend % divisor; in div64_u64_rem()
40 return dividend / divisor; in div64_u64_rem()
48 return dividend / divisor; in div64_u64()
56 return dividend / divisor; in div64_s64()
123 while (dividend >= divisor) { in __iter_div_u64_rem()
128 dividend -= divisor; in __iter_div_u64_rem()
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A Dkernel.h102 #define DIV_ROUND_CLOSEST(x, divisor)( \ argument
105 typeof(divisor) __d = divisor; \
107 ((typeof(divisor))-1) > 0 || (__x) > 0) ? \
116 #define DIV_ROUND_CLOSEST_ULL(x, divisor)( \ argument
118 typeof(divisor) __d = divisor; \
/u-boot/arch/arm/mach-uniphier/debug-uart/
A Ddebug-uart.c61 unsigned int divisor; in _debug_uart_init() local
66 divisor = uniphier_ld4_debug_uart_init(); in _debug_uart_init()
71 divisor = uniphier_pro4_debug_uart_init(); in _debug_uart_init()
76 divisor = uniphier_sld8_debug_uart_init(); in _debug_uart_init()
81 divisor = uniphier_pro5_debug_uart_init(); in _debug_uart_init()
86 divisor = uniphier_pxs2_debug_uart_init(); in _debug_uart_init()
91 divisor = uniphier_ld6b_debug_uart_init(); in _debug_uart_init()
100 writel(divisor, base + UNIPHIER_UART_LDR); in _debug_uart_init()
/u-boot/drivers/ddr/marvell/a38x/
A Dmv_ddr_common.c32 int round_div(unsigned int dividend, unsigned int divisor, unsigned int *quotient) in round_div() argument
39 if (divisor == 0) { in round_div()
43 *quotient = (dividend + divisor / 2) / divisor; in round_div()
A Dmv_ddr_common.h52 int round_div(unsigned int dividend, unsigned int divisor, unsigned int *quotient);
/u-boot/board/compulab/common/
A Domap3_display.c55 .divisor = 12 | (1 << 16),
67 .divisor = 8 | (1 << 16),
79 .divisor = 5 | (1 << 16),
91 .divisor = 4 | (1 << 16),
103 .divisor = 3 | (1 << 16),
115 .divisor = 3 | (1 << 16),
127 .divisor = 10 | (1 << 10),
244 int divisor, pixclock_val; in parse_pixclock() local
250 if (divisor <= 1) in parse_pixclock()
251 divisor = 2; in parse_pixclock()
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/u-boot/drivers/serial/
A Dserial_pl01x.c113 unsigned int divisor; in pl01x_generic_setbrg() local
120 divisor = UART_PL010_BAUD_9600; in pl01x_generic_setbrg()
123 divisor = UART_PL010_BAUD_19200; in pl01x_generic_setbrg()
126 divisor = UART_PL010_BAUD_38400; in pl01x_generic_setbrg()
129 divisor = UART_PL010_BAUD_57600; in pl01x_generic_setbrg()
132 divisor = UART_PL010_BAUD_115200; in pl01x_generic_setbrg()
135 divisor = UART_PL010_BAUD_38400; in pl01x_generic_setbrg()
138 writel((divisor & 0xf00) >> 8, &regs->pl010_lcrm); in pl01x_generic_setbrg()
139 writel(divisor & 0xff, &regs->pl010_lcrl); in pl01x_generic_setbrg()
A Dserial_mpc8xx.c42 int divisor = (gd->cpu_clk + 8 * baudrate) / 16 / baudrate; in serial_setdivisor() local
44 if (divisor / 16 > 0x1000) { in serial_setdivisor()
46 divisor = (50 * 1000 * 1000 + 8 * 9600) / 16 / 9600; in serial_setdivisor()
49 divisor /= CONFIG_SYS_BRGCLK_PRESCALE; in serial_setdivisor()
51 if (divisor <= 0x1000) in serial_setdivisor()
52 out_be32(&cp->cp_brgc1, ((divisor - 1) << 1) | CPM_BRG_EN); in serial_setdivisor()
54 out_be32(&cp->cp_brgc1, ((divisor / 16 - 1) << 1) | CPM_BRG_EN | in serial_setdivisor()
A Datmel_usart.c35 unsigned long divisor; in atmel_serial_setbrg_internal() local
44 divisor = (usart_hz / 16 + baudrate / 2) / baudrate; in atmel_serial_setbrg_internal()
45 writel(USART3_BF(CD, divisor), &usart->brgr); in atmel_serial_setbrg_internal()
152 unsigned long divisor; in _atmel_serial_set_brg() local
154 divisor = (usart_clk_rate / 16 + baudrate / 2) / baudrate; in _atmel_serial_set_brg()
155 writel(USART3_BF(CD, divisor), &usart->brgr); in _atmel_serial_set_brg()
A Daltera_uart.c24 u32 divisor; /* Baud rate divisor reg */ member
40 writel(div, &regs->divisor); in altera_uart_setbrg()
130 writel(div, &regs->divisor); in _debug_uart_init()
A Dserial_uniphier.c43 unsigned int divisor; in uniphier_serial_setbrg() local
45 divisor = DIV_ROUND_CLOSEST(priv->uartclk, mode_x_div * baudrate); in uniphier_serial_setbrg()
51 writel(divisor, priv->membase + UNIPHIER_UART_DLR); in uniphier_serial_setbrg()
/u-boot/doc/device-tree-bindings/serial/
A Dbcm2835-aux-uart.txt7 rate divisor)
10 - skip-init: if present, the baud rate divisor is not changed
A Dpl01x.txt7 rate divisor)
10 - skip-init: if present, the baud rate divisor is not changed
/u-boot/drivers/mmc/
A Dtmio-common.c554 unsigned int divisor; in tmio_sd_set_clk_rate() local
565 divisor = 2; in tmio_sd_set_clk_rate()
567 if (divisor <= 1) in tmio_sd_set_clk_rate()
570 else if (divisor <= 2) in tmio_sd_set_clk_rate()
572 else if (divisor <= 4) in tmio_sd_set_clk_rate()
574 else if (divisor <= 8) in tmio_sd_set_clk_rate()
576 else if (divisor <= 16) in tmio_sd_set_clk_rate()
578 else if (divisor <= 32) in tmio_sd_set_clk_rate()
580 else if (divisor <= 64) in tmio_sd_set_clk_rate()
582 else if (divisor <= 128) in tmio_sd_set_clk_rate()
[all …]
/u-boot/drivers/clk/aspeed/
A Dclk_ast2500.c302 u32 divisor; in ast2500_configure_mac() local
316 divisor = hpll_rate / required_rate; in ast2500_configure_mac()
318 if (divisor < 4) { in ast2500_configure_mac()
321 divisor = 4; in ast2500_configure_mac()
322 } else if (divisor > 16) { in ast2500_configure_mac()
325 divisor = 16; in ast2500_configure_mac()
343 ((divisor - 2) / 2) << SCU_MACCLK_SHIFT); in ast2500_configure_mac()
/u-boot/include/
A Ddiv64.h198 extern u32 __div64_32(u64 *dividend, u32 divisor);
237 static inline u64 lldiv(u64 dividend, u32 divisor) in lldiv() argument
240 do_div(__res, divisor); in lldiv()
/u-boot/arch/mips/mach-octeon/include/mach/
A Docteon_ddr.h753 static inline u64 divide_nint(u64 dividend, u64 divisor) in divide_nint() argument
757 quotent = dividend / divisor; in divide_nint()
758 remainder = dividend % divisor; in divide_nint()
759 return (quotent + ((remainder * 2) >= divisor)); in divide_nint()
763 static inline u64 divide_roundup(u64 dividend, u64 divisor) in divide_roundup() argument
765 return ((dividend + divisor - 1) / divisor); in divide_roundup()
/u-boot/drivers/video/nexell/soc/
A Ds5pxx18_soc_disptop_clk.h40 u32 divisor);
/u-boot/arch/arm/include/asm/arch-omap3/
A Ddss.h70 u32 divisor; /* 0x70 */ member
206 u32 divisor; member
/u-boot/fs/ubifs/
A Dbudget.c636 int divisor, factor, f; in ubifs_reported_space() local
653 divisor = UBIFS_MAX_DATA_NODE_SZ; in ubifs_reported_space()
654 divisor += (c->max_idx_node_sz * 3) / (f - 1); in ubifs_reported_space()
656 return div_u64(free, divisor); in ubifs_reported_space()
/u-boot/drivers/qe/
A Dqe.c357 u32 divisor; in qe_set_brg() local
367 divisor = (BRG_CLK / rate); in qe_set_brg()
368 if (divisor > QE_BRGC_DIVISOR_MAX + 1) { in qe_set_brg()
370 divisor /= 16; in qe_set_brg()
380 val = ((divisor - 1) << QE_BRGC_DIVISOR_SHIFT) | QE_BRGC_ENABLE; in qe_set_brg()
/u-boot/board/topic/zynq/zynq-topic-miamilite/
A Dps7_regs.txt1 0xF8000120 0x1F000200 // ARM_CLK_CTRL - divisor = 2 433 MHz (?)

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