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Searched refs:dpll_params (Results 1 – 25 of 31) sorted by relevance

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/u-boot/arch/arm/include/asm/arch-am33xx/
A Dclock.h81 struct dpll_params { struct
108 extern const struct dpll_params dpll_mpu_opp[NUM_CRYSTAL_FREQ][NUM_OPPS]; argument
109 extern const struct dpll_params dpll_core_1000MHz[NUM_CRYSTAL_FREQ];
110 extern const struct dpll_params dpll_per_192MHz[NUM_CRYSTAL_FREQ];
111 extern const struct dpll_params dpll_ddr2_266MHz[NUM_CRYSTAL_FREQ];
112 extern const struct dpll_params dpll_ddr3_303MHz[NUM_CRYSTAL_FREQ];
113 extern const struct dpll_params dpll_ddr3_400MHz[NUM_CRYSTAL_FREQ];
117 const struct dpll_params *get_dpll_mpu_params(void);
118 const struct dpll_params *get_dpll_core_params(void);
119 const struct dpll_params *get_dpll_per_params(void);
[all …]
A Dclocks_am33xx.h32 extern const struct dpll_params dpll_core_opp100;
33 extern struct dpll_params dpll_mpu_opp100;
/u-boot/board/compulab/cm_t43/
A Dspl.c18 const struct dpll_params dpll_mpu = { 800, 24, 1, -1, -1, -1, -1 };
19 const struct dpll_params dpll_core = { 1000, 24, -1, -1, 10, 8, 4 };
20 const struct dpll_params dpll_per = { 960, 24, 5, -1, -1, -1, -1 };
21 const struct dpll_params dpll_ddr = { 400, 23, 1, -1, 1, -1, -1 };
86 const struct dpll_params *get_dpll_ddr_params(void) in get_dpll_ddr_params()
91 const struct dpll_params *get_dpll_mpu_params(void) in get_dpll_mpu_params()
96 const struct dpll_params *get_dpll_core_params(void) in get_dpll_core_params()
101 const struct dpll_params *get_dpll_per_params(void) in get_dpll_per_params()
/u-boot/arch/arm/mach-omap2/am33xx/
A Dclock_am33xx.c61 struct dpll_params dpll_mpu_opp100 = {
63 const struct dpll_params dpll_core_opp100 = {
66 const struct dpll_params dpll_mpu_opp[NUM_CRYSTAL_FREQ][NUM_OPPS] = {
101 const struct dpll_params dpll_core_1000MHz[NUM_CRYSTAL_FREQ] = {
108 const struct dpll_params dpll_per_192MHz[NUM_CRYSTAL_FREQ] = {
115 const struct dpll_params dpll_ddr3_303MHz[NUM_CRYSTAL_FREQ] = {
122 const struct dpll_params dpll_ddr3_400MHz[NUM_CRYSTAL_FREQ] = {
129 const struct dpll_params dpll_ddr2_266MHz[NUM_CRYSTAL_FREQ] = {
136 __weak const struct dpll_params *get_dpll_mpu_params(void) in get_dpll_mpu_params()
141 const struct dpll_params *get_dpll_core_params(void) in get_dpll_core_params()
[all …]
A Dclock.c21 const struct dpll_params *params) in setup_post_dividers()
76 const struct dpll_params *params) in do_setup_dpll()
105 const struct dpll_params *params; in setup_dplls()
254 const struct dpll_params *params; in rtc_only_prcm_init()
A Dchilisom.c161 const struct dpll_params dpll_ddr_chilisom = {
164 const struct dpll_params *get_dpll_ddr_params(void) in get_dpll_ddr_params()
/u-boot/arch/arm/mach-omap2/omap5/
A Dhw_data.c31 static const struct dpll_params mpu_dpll_params_800mhz[NUM_SYS_CLKS] = {
42 static const struct dpll_params mpu_dpll_params_1ghz[NUM_SYS_CLKS] = {
52 static const struct dpll_params
63 static const struct dpll_params
74 static const struct dpll_params
85 static const struct dpll_params per_dpll_params_768mhz[NUM_SYS_CLKS] = {
125 static const struct dpll_params iva_dpll_params_2330mhz[NUM_SYS_CLKS] = {
147 static const struct dpll_params
161 static const struct dpll_params abe_dpll_params_32k_196608khz = {
167 static const struct dpll_params
[all …]
/u-boot/arch/arm/mach-omap2/
A Dpipe3-phy.c110 struct pipe3_dpll_params *dpll_params; in omap_pipe3_dpll_program() local
112 dpll_params = omap_pipe3_get_dpll_params(phy); in omap_pipe3_dpll_program()
113 if (!dpll_params) { in omap_pipe3_dpll_program()
120 val |= dpll_params->n << PLL_REGN_SHIFT; in omap_pipe3_dpll_program()
125 val |= dpll_params->freq << PLL_SELFREQDCO_SHIFT; in omap_pipe3_dpll_program()
130 val |= dpll_params->m << PLL_REGM_SHIFT; in omap_pipe3_dpll_program()
135 val |= dpll_params->mf << PLL_REGM_F_SHIFT; in omap_pipe3_dpll_program()
140 val |= dpll_params->sd << PLL_SD_SHIFT; in omap_pipe3_dpll_program()
A Dclocks-common.c76 void setup_post_dividers(u32 const base, const struct dpll_params *params) in setup_post_dividers()
151 const struct dpll_params *get_mpu_dpll_params(struct dplls const *dpll_data) in get_mpu_dpll_params()
163 const struct dpll_params *get_per_dpll_params(struct dplls const *dpll_data) in get_per_dpll_params()
191 static const struct dpll_params *get_ddr_dpll_params in get_ddr_dpll_params()
202 static const struct dpll_params *get_gmac_dpll_params in get_gmac_dpll_params()
213 static void do_setup_dpll(u32 const base, const struct dpll_params *params, in do_setup_dpll()
273 const struct dpll_params *core_dpll_params; in omap_ddr_clk()
317 const struct dpll_params *params; in configure_mpu_dpll()
350 const struct dpll_params *params; in setup_usb_dpll()
379 const struct dpll_params *params; in setup_dplls()
[all …]
/u-boot/arch/arm/mach-omap2/omap4/
A Dhw_data.c39 static const struct dpll_params mpu_dpll_params_1400mhz[NUM_SYS_CLKS] = {
54 static const struct dpll_params mpu_dpll_params_1600mhz[NUM_SYS_CLKS] = {
68 static const struct dpll_params mpu_dpll_params_1200mhz[NUM_SYS_CLKS] = {
80 static const struct dpll_params core_dpll_params_1600mhz[NUM_SYS_CLKS] = {
91 static const struct dpll_params core_dpll_params_es1_1524mhz[NUM_SYS_CLKS] = {
102 static const struct dpll_params
113 static const struct dpll_params per_dpll_params_1536mhz[NUM_SYS_CLKS] = {
123 static const struct dpll_params iva_dpll_params_1862mhz[NUM_SYS_CLKS] = {
135 static const struct dpll_params
147 static const struct dpll_params abe_dpll_params_32k_196608khz = {
[all …]
/u-boot/drivers/usb/phy/
A Domap_usb_phy.c82 struct usb3_dpll_params *dpll_params; in omap_usb_dpll_lock() local
85 dpll_params = omap_usb3_get_dpll_params(); in omap_usb_dpll_lock()
86 if (!dpll_params) in omap_usb_dpll_lock()
91 val |= dpll_params->n << PLL_REGN_SHIFT; in omap_usb_dpll_lock()
96 val |= dpll_params->freq << PLL_SELFREQDCO_SHIFT; in omap_usb_dpll_lock()
101 val |= dpll_params->m << PLL_REGM_SHIFT; in omap_usb_dpll_lock()
106 val |= dpll_params->mf << PLL_REGM_F_SHIFT; in omap_usb_dpll_lock()
111 val |= dpll_params->sd << PLL_SD_SHIFT; in omap_usb_dpll_lock()
/u-boot/drivers/usb/dwc3/
A Dti_usb_phy.c152 struct usb3_dpll_params *dpll_params; in ti_usb3_dpll_program() local
157 dpll_params = ti_usb3_get_dpll_params(phy); in ti_usb3_dpll_program()
158 if (!dpll_params) in ti_usb3_dpll_program()
163 val |= dpll_params->n << PLL_REGN_SHIFT; in ti_usb3_dpll_program()
168 val |= dpll_params->freq << PLL_SELFREQDCO_SHIFT; in ti_usb3_dpll_program()
173 val |= dpll_params->m << PLL_REGM_SHIFT; in ti_usb3_dpll_program()
178 val |= dpll_params->mf << PLL_REGM_F_SHIFT; in ti_usb3_dpll_program()
183 val |= dpll_params->sd << PLL_SD_SHIFT; in ti_usb3_dpll_program()
/u-boot/board/ti/am43xx/
A Dboard.c61 const struct dpll_params dpll_mpu[NUM_CRYSTAL_FREQ][NUM_OPPS] = {
96 const struct dpll_params dpll_core[NUM_CRYSTAL_FREQ] = {
103 const struct dpll_params dpll_per[NUM_CRYSTAL_FREQ] = {
110 const struct dpll_params epos_evm_dpll_ddr[NUM_CRYSTAL_FREQ] = {
117 const struct dpll_params gp_evm_dpll_ddr = {
120 static const struct dpll_params idk_dpll_ddr = {
327 const struct dpll_params *get_dpll_ddr_params(void) in get_dpll_ddr_params()
370 const struct dpll_params *get_dpll_mpu_params(void) in get_dpll_mpu_params()
378 const struct dpll_params *get_dpll_core_params(void) in get_dpll_core_params()
385 const struct dpll_params *get_dpll_per_params(void) in get_dpll_per_params()
[all …]
/u-boot/board/eets/pdu001/
A Dboard.c188 const struct dpll_params dpll_ddr = {
190 const struct dpll_params dpll_ddr_evm_sk = {
192 const struct dpll_params dpll_ddr_bone_black = {
212 const struct dpll_params *get_dpll_ddr_params(void) in get_dpll_ddr_params()
/u-boot/arch/arm/include/asm/
A Domap_common.h489 struct dpll_params { struct
524 const struct dpll_params *mpu; argument
525 const struct dpll_params *core;
526 const struct dpll_params *per;
527 const struct dpll_params *abe;
528 const struct dpll_params *iva;
529 const struct dpll_params *usb;
530 const struct dpll_params *ddr;
531 const struct dpll_params *gmac;
617 const struct dpll_params *get_mpu_dpll_params(struct dplls const *);
[all …]
/u-boot/board/phytec/phycore_am335x_r2/
A Dboard.c37 const struct dpll_params dpll_ddr = {
40 const struct dpll_params *get_dpll_ddr_params(void) in get_dpll_ddr_params()
167 const struct dpll_params *get_dpll_mpu_params(void) in get_dpll_mpu_params()
/u-boot/board/compulab/cm_t335/
A Dspl.c62 const struct dpll_params dpll_ddr = {
80 const struct dpll_params *get_dpll_ddr_params(void) in get_dpll_ddr_params()
/u-boot/board/BuR/brsmarc1/
A Dboard.c74 const struct dpll_params dpll_ddr3 = { 400, OSC - 1, 1, -1, -1, -1, -1};
116 const struct dpll_params *get_dpll_ddr_params(void) in get_dpll_ddr_params()
/u-boot/drivers/phy/
A Dti-pipe3-phy.c223 struct pipe3_dpll_params *dpll_params; in omap_pipe3_dpll_program() local
225 dpll_params = omap_pipe3_get_dpll_params(pipe3); in omap_pipe3_dpll_program()
226 if (!dpll_params) { in omap_pipe3_dpll_program()
233 val |= dpll_params->n << PLL_REGN_SHIFT; in omap_pipe3_dpll_program()
238 val |= dpll_params->freq << PLL_SELFREQDCO_SHIFT; in omap_pipe3_dpll_program()
243 val |= dpll_params->m << PLL_REGM_SHIFT; in omap_pipe3_dpll_program()
248 val |= dpll_params->mf << PLL_REGM_F_SHIFT; in omap_pipe3_dpll_program()
253 val |= dpll_params->sd << PLL_SD_SHIFT; in omap_pipe3_dpll_program()
/u-boot/board/BuR/brppt1/
A Dboard.c80 static const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1};
133 const struct dpll_params *get_dpll_ddr_params(void) in get_dpll_ddr_params()
/u-boot/board/BuR/brxre1/
A Dboard.c81 const struct dpll_params dpll_ddr3 = { 400, OSC - 1, 1, -1, -1, -1, -1};
126 const struct dpll_params *get_dpll_ddr_params(void) in get_dpll_ddr_params()
/u-boot/board/bosch/guardian/
A Dboard.c75 const struct dpll_params dpll_ddr = {
142 const struct dpll_params *get_dpll_ddr_params(void) in get_dpll_ddr_params()
/u-boot/board/vscom/baltos/
A Dboard.c167 const struct dpll_params dpll_ddr = {
169 const struct dpll_params dpll_ddr_evm_sk = {
171 const struct dpll_params dpll_ddr_baltos = {
225 const struct dpll_params *get_dpll_ddr_params(void) in get_dpll_ddr_params()
/u-boot/board/siemens/common/
A Dboard.c107 const struct dpll_params dpll_ddr = {
110 const struct dpll_params *get_dpll_ddr_params(void) in get_dpll_ddr_params()
/u-boot/board/bosch/shc/
A Dboard.c290 const struct dpll_params dpll_ddr_shc = {
293 const struct dpll_params *get_dpll_ddr_params(void) in get_dpll_ddr_params()
309 const struct dpll_params dpll_mpu_shc_opp100 = {

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